From patchwork Thu Jun 4 06:19:00 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gavin Shan X-Patchwork-Id: 480443 X-Patchwork-Delegate: benh@kernel.crashing.org Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 931B9140187 for ; Thu, 4 Jun 2015 16:22:04 +1000 (AEST) Received: from ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 72F531A0D6A for ; Thu, 4 Jun 2015 16:22:04 +1000 (AEST) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Received: from e23smtp08.au.ibm.com (e23smtp08.au.ibm.com [202.81.31.141]) (using TLSv1 with cipher CAMELLIA256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 7798E1A08AC for ; Thu, 4 Jun 2015 16:21:51 +1000 (AEST) Received: from /spool/local by e23smtp08.au.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Thu, 4 Jun 2015 16:21:47 +1000 Received: from d23relay09.au.ibm.com (d23relay09.au.ibm.com [9.185.63.181]) by d23dlp02.au.ibm.com (Postfix) with ESMTP id 179D52BB0051 for ; Thu, 4 Jun 2015 16:21:47 +1000 (EST) Received: from d23av03.au.ibm.com (d23av03.au.ibm.com [9.190.234.97]) by d23relay09.au.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id t546KOGE2032040 for ; Thu, 4 Jun 2015 16:20:32 +1000 Received: from d23av03.au.ibm.com (localhost [127.0.0.1]) by d23av03.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id t546JxH1011826 for ; Thu, 4 Jun 2015 16:19:59 +1000 Received: from ozlabs.au.ibm.com (ozlabs.au.ibm.com [9.192.253.14]) by d23av03.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVin) with ESMTP id t546JxDu010910; Thu, 4 Jun 2015 16:19:59 +1000 Received: from bran.ozlabs.ibm.com (unknown [9.192.254.114]) by ozlabs.au.ibm.com (Postfix) with ESMTP id 1C591A03DC; Thu, 4 Jun 2015 16:19:13 +1000 (AEST) Received: from gwshan (shangw.ozlabs.ibm.com [10.61.2.199]) by bran.ozlabs.ibm.com (Postfix) with ESMTP id 26B3AE387C; Thu, 4 Jun 2015 16:19:13 +1000 (AEST) Received: by gwshan (Postfix, from userid 1000) id 1AC6B9422B2; Thu, 4 Jun 2015 16:19:13 +1000 (AEST) From: Gavin Shan To: skiboot@lists.ozlabs.org Date: Thu, 4 Jun 2015 16:19:00 +1000 Message-Id: <1433398749-15096-9-git-send-email-gwshan@linux.vnet.ibm.com> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1433398749-15096-1-git-send-email-gwshan@linux.vnet.ibm.com> References: <1433398749-15096-1-git-send-email-gwshan@linux.vnet.ibm.com> X-TM-AS-MML: disable X-Content-Scanned: Fidelis XPS MAILER x-cbid: 15060406-0029-0000-0000-000001A86422 Subject: [Skiboot] [PATCH v7 08/17] core/pci: Allow iteration on specified devices X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" The patch reworks pci_walk_dev() to allow iteration on all the subordinate child devices beneath the specified one, so that the function can be reused in PCI slot management code in subsequent patches. The patch doesn't change the existing logic except adding one more parameter to pci_walk_dev() to indicate the top-level PCI device. When that's NULL, all subordinate PCI devices under the specified PHB will be iterated. Signed-off-by: Gavin Shan --- core/pci.c | 14 +++++++++----- hw/p7ioc-phb.c | 2 +- hw/phb3.c | 2 +- include/pci.h | 3 ++- 4 files changed, 13 insertions(+), 8 deletions(-) diff --git a/core/pci.c b/core/pci.c index 0258826..ff36af6 100644 --- a/core/pci.c +++ b/core/pci.c @@ -764,9 +764,9 @@ static void pci_scan_phb(void *data) pci_scan(phb, 0, 0xff, &phb->devices, NULL, has_link); /* Configre MPS (Max Payload Size) for PCIe domain */ - pci_walk_dev(phb, pci_get_mps, &mps); + pci_walk_dev(phb, NULL, pci_get_mps, &mps); phb->mps = mps; - pci_walk_dev(phb, pci_configure_mps, NULL); + pci_walk_dev(phb, NULL, pci_configure_mps, NULL); } int64_t pci_register_phb(struct phb *phb) @@ -1465,11 +1465,15 @@ static struct pci_device *__pci_walk_dev(struct phb *phb, } struct pci_device *pci_walk_dev(struct phb *phb, + struct pci_device *pd, int (*cb)(struct phb *, struct pci_device *, void *), void *userdata) { + if (pd) + return __pci_walk_dev(phb, &pd->children, cb, userdata); + return __pci_walk_dev(phb, &phb->devices, cb, userdata); } @@ -1489,7 +1493,7 @@ static int __pci_find_dev(struct phb *phb, struct pci_device *pci_find_dev(struct phb *phb, uint16_t bdfn) { - return pci_walk_dev(phb, __pci_find_dev, &bdfn); + return pci_walk_dev(phb, NULL, __pci_find_dev, &bdfn); } static int __pci_restore_bridge_buses(struct phb *phb, @@ -1508,7 +1512,7 @@ static int __pci_restore_bridge_buses(struct phb *phb, return 0; } -void pci_restore_bridge_buses(struct phb *phb) +void pci_restore_bridge_buses(struct phb *phb, struct pci_device *pd) { - pci_walk_dev(phb, __pci_restore_bridge_buses, NULL); + pci_walk_dev(phb, pd, __pci_restore_bridge_buses, NULL); } diff --git a/hw/p7ioc-phb.c b/hw/p7ioc-phb.c index 89592c4..887d9dc 100644 --- a/hw/p7ioc-phb.c +++ b/hw/p7ioc-phb.c @@ -345,7 +345,7 @@ static int64_t p7ioc_sm_freset(struct p7ioc_phb *p) */ if (p->flags & P7IOC_RESTORE_BUS_NUM) { p->flags &= ~P7IOC_RESTORE_BUS_NUM; - pci_restore_bridge_buses(&p->phb); + pci_restore_bridge_buses(&p->phb, NULL); } return OPAL_SUCCESS; diff --git a/hw/phb3.c b/hw/phb3.c index 47212a6..355b04a 100644 --- a/hw/phb3.c +++ b/hw/phb3.c @@ -1957,7 +1957,7 @@ static void phb3_setup_for_link_up(struct phb3 *p) */ if (p->flags & PHB3_RESTORE_BUS_NUM) { p->flags &= ~PHB3_RESTORE_BUS_NUM; - pci_restore_bridge_buses(&p->phb); + pci_restore_bridge_buses(&p->phb, NULL); } } diff --git a/include/pci.h b/include/pci.h index 6b3a228..2093937 100644 --- a/include/pci.h +++ b/include/pci.h @@ -488,12 +488,13 @@ extern int64_t pci_find_ecap(struct phb *phb, uint16_t bdfn, uint16_t cap, uint8_t *version); extern void pci_device_init(struct phb *phb, struct pci_device *pd); extern struct pci_device *pci_walk_dev(struct phb *phb, + struct pci_device *pd, int (*cb)(struct phb *, struct pci_device *, void *), void *userdata); extern struct pci_device *pci_find_dev(struct phb *phb, uint16_t bdfn); -extern void pci_restore_bridge_buses(struct phb *phb); +extern void pci_restore_bridge_buses(struct phb *phb, struct pci_device *pd); /* Manage PHBs */ extern int64_t pci_register_phb(struct phb *phb);