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[00/10] hwprobe patches

Message ID 20210626023824.1124164-1-npiggin@gmail.com
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Series hwprobe patches | expand

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Nicholas Piggin June 26, 2021, 2:38 a.m. UTC
I've kept these patches going and made some small changes here and
there. The series also removes POWER8 DD1 in order to move P8
specific SLW code under CONFIG_P8 without causing a lot of clashes
with POWER8 DD1 removal that I want to do for a later patch
(rewriting OPAL_REINIT_CPUS code) so I thought it could just go here.

This is not based on the patches Vasant just submitted, I'm happy to
rebase it, just wanted to post it out now as is to see if people are
happy with it.

The main non-cosmetic change is adding CONFIG_P8/NPU defines to the
preprocessor, which allows a lot more flexibility with modularising
stuff.

Thanks,
Nick

Nicholas Piggin (2):
  Remove support for POWER8 DD1
  hw/slw: Move P8 bits behind CONFIG_P8

Stewart Smith (8):
  Introduce hwprobe facility to avoid hard-coding probe functions
  hwprobe: convert PHB, NPU subsystems to hwprobe
  Add CONFIG_P8 with PHB3 behind it
  hwprobe: convert vas_init(), nx_init()
  npu: move npu_set_fence_state() to phb_ops
  npu: Move npu.o and npu-hw-procedules.o under CONIFG_P8
  platforms: put P8 platforms behind CONFIG_P8
  npu: Add CONFIG_NPU to optionally skip NPU code

 Makefile                       |   4 +
 Makefile.main                  |  19 +-
 core/Makefile.inc              |   1 +
 core/cpu.c                     |  21 +-
 core/fast-reboot.c             |   2 +
 core/hmi.c                     |  12 +-
 core/hwprobe.c                 |  70 ++++++
 core/init.c                    |  18 +-
 core/platform.c                |   1 -
 hw/Makefile.inc                |  20 +-
 hw/npu.c                       |   9 +-
 hw/npu2-common.c               |   2 +
 hw/npu2.c                      |   1 +
 hw/npu3.c                      |   2 +
 hw/nx.c                        |   2 +
 hw/phb3.c                      |   2 +-
 hw/phb4.c                      |   2 +
 hw/slw.c                       | 437 +++++----------------------------
 hw/vas.c                       |   2 +
 include/npu.h                  |   1 -
 include/npu2.h                 |   6 +
 include/pci.h                  |   6 +
 include/skiboot.h              |  42 +++-
 libpore/Makefile.inc           |   8 +-
 platforms/astbmc/Makefile.inc  |  22 +-
 platforms/ibm-fsp/Makefile.inc |   7 +-
 skiboot.lds.S                  |   6 +
 27 files changed, 301 insertions(+), 424 deletions(-)
 create mode 100644 core/hwprobe.c

Comments

Dan Horák July 1, 2021, 10:43 a.m. UTC | #1
On Sat, 26 Jun 2021 12:38:14 +1000
Nicholas Piggin <npiggin@gmail.com> wrote:

> I've kept these patches going and made some small changes here and
> there. The series also removes POWER8 DD1 in order to move P8
> specific SLW code under CONFIG_P8 without causing a lot of clashes
> with POWER8 DD1 removal that I want to do for a later patch
> (rewriting OPAL_REINIT_CPUS code) so I thought it could just go here.
> 
> This is not based on the patches Vasant just submitted, I'm happy to
> rebase it, just wanted to post it out now as is to see if people are
> happy with it.
> 
> The main non-cosmetic change is adding CONFIG_P8/NPU defines to the
> preprocessor, which allows a lot more flexibility with modularising
> stuff.

LGTM

Reviewed-by: Dan Horák <dan@danny.cz>


		Dan
 
> Thanks,
> Nick
> 
> Nicholas Piggin (2):
>   Remove support for POWER8 DD1
>   hw/slw: Move P8 bits behind CONFIG_P8
> 
> Stewart Smith (8):
>   Introduce hwprobe facility to avoid hard-coding probe functions
>   hwprobe: convert PHB, NPU subsystems to hwprobe
>   Add CONFIG_P8 with PHB3 behind it
>   hwprobe: convert vas_init(), nx_init()
>   npu: move npu_set_fence_state() to phb_ops
>   npu: Move npu.o and npu-hw-procedules.o under CONIFG_P8
>   platforms: put P8 platforms behind CONFIG_P8
>   npu: Add CONFIG_NPU to optionally skip NPU code
> 
>  Makefile                       |   4 +
>  Makefile.main                  |  19 +-
>  core/Makefile.inc              |   1 +
>  core/cpu.c                     |  21 +-
>  core/fast-reboot.c             |   2 +
>  core/hmi.c                     |  12 +-
>  core/hwprobe.c                 |  70 ++++++
>  core/init.c                    |  18 +-
>  core/platform.c                |   1 -
>  hw/Makefile.inc                |  20 +-
>  hw/npu.c                       |   9 +-
>  hw/npu2-common.c               |   2 +
>  hw/npu2.c                      |   1 +
>  hw/npu3.c                      |   2 +
>  hw/nx.c                        |   2 +
>  hw/phb3.c                      |   2 +-
>  hw/phb4.c                      |   2 +
>  hw/slw.c                       | 437 +++++----------------------------
>  hw/vas.c                       |   2 +
>  include/npu.h                  |   1 -
>  include/npu2.h                 |   6 +
>  include/pci.h                  |   6 +
>  include/skiboot.h              |  42 +++-
>  libpore/Makefile.inc           |   8 +-
>  platforms/astbmc/Makefile.inc  |  22 +-
>  platforms/ibm-fsp/Makefile.inc |   7 +-
>  skiboot.lds.S                  |   6 +
>  27 files changed, 301 insertions(+), 424 deletions(-)
>  create mode 100644 core/hwprobe.c
> 
> -- 
> 2.23.0
> 
> _______________________________________________
> Skiboot mailing list
> Skiboot@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/skiboot
Stewart Smith July 2, 2021, 6:01 p.m. UTC | #2
On Fri, Jun 25, 2021, at 7:38 PM, Nicholas Piggin wrote:
> I've kept these patches going and made some small changes here and
> there. The series also removes POWER8 DD1 in order to move P8
> specific SLW code under CONFIG_P8 without causing a lot of clashes
> with POWER8 DD1 removal that I want to do for a later patch
> (rewriting OPAL_REINIT_CPUS code) so I thought it could just go here.
> 
> This is not based on the patches Vasant just submitted, I'm happy to
> rebase it, just wanted to post it out now as is to see if people are
> happy with it.
> 
> The main non-cosmetic change is adding CONFIG_P8/NPU defines to the
> preprocessor, which allows a lot more flexibility with modularising
> stuff.

Neat! I'd been meaning to resurrect these. Not sure I can really reviewed-by my own patches with a straight face, but I still think they're a good idea :)
Nicholas Piggin July 5, 2021, 12:39 a.m. UTC | #3
Excerpts from Stewart Smith's message of July 3, 2021 4:01 am:
> On Fri, Jun 25, 2021, at 7:38 PM, Nicholas Piggin wrote:
>> I've kept these patches going and made some small changes here and
>> there. The series also removes POWER8 DD1 in order to move P8
>> specific SLW code under CONFIG_P8 without causing a lot of clashes
>> with POWER8 DD1 removal that I want to do for a later patch
>> (rewriting OPAL_REINIT_CPUS code) so I thought it could just go here.
>> 
>> This is not based on the patches Vasant just submitted, I'm happy to
>> rebase it, just wanted to post it out now as is to see if people are
>> happy with it.
>> 
>> The main non-cosmetic change is adding CONFIG_P8/NPU defines to the
>> preprocessor, which allows a lot more flexibility with modularising
>> stuff.
> 
> Neat! I'd been meaning to resurrect these. Not sure I can really reviewed-by my own patches with a straight face, but I still think they're a good idea :)
> 

Just so long as you don't have a problem with the tweaks I made (I can 
add a small note about it in the changelog). If you preferred to take 
over that's fine too, I probably should have pinged you first.

We're running into some 512kB limit on some platforms (although I liked 
the patches even before that :P).

Thanks,
Nick