@@ -6337,6 +6337,12 @@ F: include/net/devlink.h
F: include/uapi/linux/devlink.h
F: net/devlink/
+DFROBOT SD2405AL RTC DRIVER
+M: Tóth János <gomba007@gmail.com>
+L: linux-rtc@vger.kernel.org
+S: Maintained
+F: drivers/rtc/rtc-sd2405al.c
+
DH ELECTRONICS IMX6 DHCOM/DHCOR BOARD SUPPORT
M: Christoph Niedermaier <cniedermaier@dh-electronics.com>
L: kernel@dh-electronics.com
@@ -743,6 +743,16 @@ config RTC_DRV_S5M
This driver can also be built as a module. If so, the module
will be called rtc-s5m.
+config RTC_DRV_SD2405AL
+ tristate "DFRobot SD2405AL"
+ select REGMAP_I2C
+ help
+ If you say yes here you will get support for the
+ DFRobot SD2405AL I2C RTC Module.
+
+ This driver can also be built as a module. If so, the module
+ will be called rtc-sd2405al.
+
config RTC_DRV_SD3078
tristate "ZXW Shenzhen whwave SD3078"
select REGMAP_I2C
@@ -162,6 +162,7 @@ obj-$(CONFIG_RTC_DRV_S3C) += rtc-s3c.o
obj-$(CONFIG_RTC_DRV_S5M) += rtc-s5m.o
obj-$(CONFIG_RTC_DRV_SA1100) += rtc-sa1100.o
obj-$(CONFIG_RTC_DRV_SC27XX) += rtc-sc27xx.o
+obj-$(CONFIG_RTC_DRV_SD2405AL) += rtc-sd2405al.o
obj-$(CONFIG_RTC_DRV_SD3078) += rtc-sd3078.o
obj-$(CONFIG_RTC_DRV_SH) += rtc-sh.o
obj-$(CONFIG_RTC_DRV_SNVS) += rtc-snvs.o
new file mode 100644
@@ -0,0 +1,305 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * RTC driver for the SD2405AL Real-Time Clock
+ *
+ * Datasheet:
+ * https://image.dfrobot.com/image/data/TOY0021/SD2405AL%20datasheet%20(Angelo%20v0.1).pdf
+ *
+ * Copyright (C) 2024 Tóth János <gomba007@gmail.com>
+ * Copyright (C) 2018 Zoro Li <long17.cool@163.com> (rtc-sd3078.c)
+ * Copyright (C) 2005 James Chapman (rtc-ds1307.c)
+ */
+
+#include <linux/bcd.h>
+#include <linux/i2c.h>
+#include <linux/module.h>
+#include <linux/regmap.h>
+#include <linux/rtc.h>
+
+/* Real time clock registers */
+#define SD2405AL_REG_T_BASE 0x00
+#define SD2405AL_REG_T_SEC 0x00
+#define SD2405AL_REG_T_MIN 0x01
+#define SD2405AL_REG_T_HOUR 0x02
+# define SD2405AL_BIT_12H_PM BIT(5)
+# define SD2405AL_BIT_24H BIT(7)
+#define SD2405AL_REG_T_WEEK 0x03
+#define SD2405AL_REG_T_DAY 0x04
+#define SD2405AL_REG_T_MON 0x05
+#define SD2405AL_REG_T_YEAR 0x06
+
+#define SD2405AL_NUM_T_REGS (SD2405AL_REG_T_YEAR - SD2405AL_REG_T_SEC + 1)
+
+/* Control registers */
+#define SD2405AL_REG_CTR_BASE 0x0F
+#define SD2405AL_REG_CTR1 0x00
+# define SD2405AL_BIT_WRTC2 BIT(2)
+# define SD2405AL_BIT_WRTC3 BIT(6)
+#define SD2405AL_REG_CTR2 0x01
+# define SD2405AL_BIT_WRTC1 BIT(7)
+#define SD2405AL_REG_CTR3 0x02
+#define SD2405AL_REG_TTF 0x03
+#define SD2405AL_REG_CNTDWN 0x04
+
+/* General RAM */
+#define SD2405AL_REG_M_START 0x14
+#define SD2405AL_REG_M_END 0x1F
+
+struct sd2405al {
+ struct device *dev;
+ struct rtc_device *rtc;
+ struct regmap *regmap;
+};
+
+static int sd2405al_setup(struct sd2405al *sd2405al)
+{
+ unsigned int reg;
+ unsigned int val;
+ int ret;
+
+ /* enable write, order is important */
+ reg = SD2405AL_REG_CTR_BASE + SD2405AL_REG_CTR2;
+ val = SD2405AL_BIT_WRTC1;
+ /*
+ * CTR2.IM = 0, single event alarm
+ * CTR2.S{1,0} = 0, disable INT pin
+ * CTR2.FOBAT = 0, interrupt enabled during battery backup mode
+ * CTR2.INTDE = 0, countdown interrupt disabled
+ * CTR2.INTAE = 0, alarm interrupt disabled
+ * CTR2.INTFE = 0, frequency interrupt disabled
+ */
+ ret = regmap_write(sd2405al->regmap, reg, val);
+ if (ret < 0) {
+ dev_err(sd2405al->dev, "write failed: %d\n", ret);
+ return ret;
+ }
+
+ reg = SD2405AL_REG_CTR_BASE + SD2405AL_REG_CTR1;
+ val = SD2405AL_BIT_WRTC2 | SD2405AL_BIT_WRTC3;
+ /*
+ * CTR1.INTAF = 0, clear alarm interrupt flag
+ * CTR2.INTDF = 0, clear countdown interrupt flag
+ */
+ ret = regmap_write(sd2405al->regmap, reg, val);
+ if (ret < 0) {
+ dev_err(sd2405al->dev, "write failed: %d\n", ret);
+ return ret;
+ }
+
+ reg = SD2405AL_REG_CTR_BASE + SD2405AL_REG_CTR3;
+ val = 0;
+ /*
+ * CRT3.ARTS = 0, disable auto reset of interrupt flags
+ * CTR3.TDS{1,0} = 0, unused, since countdown interrupt is disabled
+ * CTR3.FS{3,0} = 0, unused since frequency interrupt is disabled
+ */
+ ret = regmap_write(sd2405al->regmap, reg, val);
+ if (ret < 0) {
+ dev_err(sd2405al->dev, "write failed: %d\n", ret);
+ return ret;
+ }
+
+ dev_dbg(sd2405al->dev, "setup done\n");
+
+ return 0;
+}
+
+static int sd2405al_check_writable(struct sd2405al *sd2405al)
+{
+ u8 data[2] = { 0 };
+ int w32, w1;
+ int ret;
+
+ ret = regmap_bulk_read(sd2405al->regmap,
+ SD2405AL_REG_CTR_BASE, data, 2);
+ if (ret < 0) {
+ dev_err(sd2405al->dev, "read failed: %d\n", ret);
+ return ret;
+ }
+
+ w32 = data[SD2405AL_REG_CTR1];
+ w32 &= (SD2405AL_BIT_WRTC2 | SD2405AL_BIT_WRTC3);
+
+ w1 = data[SD2405AL_REG_CTR2];
+ w1 &= SD2405AL_BIT_WRTC1;
+
+ return (w32 != 0) && (w1 != 0);
+}
+
+static int sd2405al_read_time(struct device *dev, struct rtc_time *time)
+{
+ u8 hour;
+ u8 data[SD2405AL_NUM_T_REGS] = { 0 };
+ struct sd2405al *sd2405al = dev_get_drvdata(dev);
+ int ret;
+
+ /* check if the device is powered on/working */
+ ret = sd2405al_check_writable(sd2405al);
+ if (ret == 0) {
+ dev_err(sd2405al->dev, "invalid device status\n");
+ return -EINVAL;
+ } else if (ret < 0) {
+ return ret;
+ } else {
+ dev_dbg(sd2405al->dev, "device status is valid\n");
+ }
+
+ ret = regmap_bulk_read(sd2405al->regmap, SD2405AL_REG_T_BASE, data,
+ SD2405AL_NUM_T_REGS);
+ if (ret < 0) {
+ dev_err(sd2405al->dev, "read failed: %d\n", ret);
+ return ret;
+ }
+
+ time->tm_sec = bcd2bin(data[SD2405AL_REG_T_SEC] & 0x7F);
+ time->tm_min = bcd2bin(data[SD2405AL_REG_T_MIN] & 0x7F);
+
+ hour = data[SD2405AL_REG_T_HOUR];
+ if (hour & SD2405AL_BIT_24H)
+ time->tm_hour = bcd2bin(hour & 0x3F);
+ else
+ if (hour & SD2405AL_BIT_12H_PM)
+ time->tm_hour = bcd2bin(hour & 0x1F) + 12;
+ else /* 12 hour mode, AM */
+ time->tm_hour = bcd2bin(hour & 0x1F);
+
+ time->tm_mday = bcd2bin(data[SD2405AL_REG_T_DAY] & 0x3F);
+ time->tm_wday = data[SD2405AL_REG_T_WEEK] & 0x07;
+ time->tm_mon = bcd2bin(data[SD2405AL_REG_T_MON] & 0x1F) - 1;
+ time->tm_year = bcd2bin(data[SD2405AL_REG_T_YEAR]) + 100;
+
+ dev_dbg(sd2405al->dev, "read time: %d-%02d-%02d %02d:%02d:%02d\n",
+ time->tm_year, time->tm_mon, time->tm_mday,
+ time->tm_hour, time->tm_min, time->tm_sec);
+
+ return 0;
+}
+
+static int sd2405al_set_time(struct device *dev, struct rtc_time *time)
+{
+ u8 data[SD2405AL_NUM_T_REGS];
+ struct sd2405al *sd2405al = dev_get_drvdata(dev);
+ int ret;
+
+ ret = sd2405al_check_writable(sd2405al);
+ if (ret == 0) {
+ dev_err(sd2405al->dev, "device is not writable\n");
+ return -EINVAL;
+ } else if (ret < 0) {
+ return ret;
+ } else {
+ dev_dbg(sd2405al->dev, "device is writable\n");
+ }
+
+ data[SD2405AL_REG_T_SEC] = bin2bcd(time->tm_sec);
+ data[SD2405AL_REG_T_MIN] = bin2bcd(time->tm_min);
+ data[SD2405AL_REG_T_HOUR] = bin2bcd(time->tm_hour) | SD2405AL_BIT_24H;
+ data[SD2405AL_REG_T_DAY] = bin2bcd(time->tm_mday);
+ data[SD2405AL_REG_T_WEEK] = time->tm_wday & 0x07;
+ data[SD2405AL_REG_T_MON] = bin2bcd(time->tm_mon) + 1;
+ data[SD2405AL_REG_T_YEAR] = bin2bcd(time->tm_year - 100);
+
+ ret = regmap_bulk_write(sd2405al->regmap, SD2405AL_REG_T_BASE, data,
+ SD2405AL_NUM_T_REGS);
+ if (ret < 0) {
+ dev_err(sd2405al->dev, "write failed: %d\n", ret);
+ return ret;
+ }
+
+ dev_dbg(sd2405al->dev, "set time: %d-%02d-%02d %02d:%02d:%02d\n",
+ time->tm_year, time->tm_mon, time->tm_mday,
+ time->tm_hour, time->tm_min, time->tm_sec);
+
+ return 0;
+}
+
+static const struct rtc_class_ops sd2405al_rtc_ops = {
+ .read_time = sd2405al_read_time,
+ .set_time = sd2405al_set_time,
+};
+
+static const struct regmap_config sd2405al_regmap_conf = {
+ .reg_bits = 8,
+ .val_bits = 8,
+ .max_register = SD2405AL_REG_M_END,
+};
+
+static int sd2405al_probe(struct i2c_client *client)
+{
+ struct sd2405al *sd2405al;
+ int func;
+ int ret;
+
+ func = i2c_check_functionality(client->adapter, I2C_FUNC_I2C);
+ if (!func) {
+ dev_err(&client->dev, "invalid adapter\n");
+ return -ENODEV;
+ }
+
+ sd2405al = devm_kzalloc(&client->dev, sizeof(*sd2405al), GFP_KERNEL);
+ if (!sd2405al) {
+ dev_err(&client->dev, "unable to allocate memory\n");
+ return -ENOMEM;
+ }
+
+ sd2405al->dev = &client->dev;
+
+ sd2405al->regmap = devm_regmap_init_i2c(client, &sd2405al_regmap_conf);
+ if (IS_ERR(sd2405al->regmap)) {
+ dev_err(sd2405al->dev, "unable to allocate regmap\n");
+ return PTR_ERR(sd2405al->regmap);
+ }
+
+ ret = sd2405al_setup(sd2405al);
+ if (ret < 0) {
+ dev_err(sd2405al->dev, "unable to setup device\n");
+ return ret;
+ }
+
+ sd2405al->rtc = devm_rtc_allocate_device(&client->dev);
+ if (IS_ERR(sd2405al->rtc)) {
+ dev_err(sd2405al->dev, "unable to allocate device\n");
+ return PTR_ERR(sd2405al->rtc);
+ }
+
+ sd2405al->rtc->ops = &sd2405al_rtc_ops;
+ sd2405al->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
+ sd2405al->rtc->range_max = RTC_TIMESTAMP_END_2099;
+
+ dev_set_drvdata(&client->dev, sd2405al);
+
+ ret = devm_rtc_register_device(sd2405al->rtc);
+ if (ret < 0) {
+ dev_err(sd2405al->dev, "unable to register device: %d\n", ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+static const struct i2c_device_id sd2405al_id[] = {
+ { "sd2405al", 0 },
+ { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(i2c, sd2405al_id);
+
+static const __maybe_unused struct of_device_id sd2405al_of_match[] = {
+ { .compatible = "dfrobot,sd2405al" },
+ { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, sd2405al_of_match);
+
+static struct i2c_driver sd2405al_driver = {
+ .driver = {
+ .name = "sd2405al",
+ .of_match_table = of_match_ptr(sd2405al_of_match),
+ },
+ .probe = sd2405al_probe,
+ .id_table = sd2405al_id,
+};
+
+module_i2c_driver(sd2405al_driver);
+
+MODULE_AUTHOR("Tóth János");
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("SD2405AL RTC driver");