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Mon, 22 Jul 2024 18:01:41 +0200 (MEST) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 9A8C340044; Mon, 22 Jul 2024 18:01:35 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 79D442786EA; Mon, 22 Jul 2024 18:00:58 +0200 (CEST) Received: from localhost (10.48.86.111) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.37; Mon, 22 Jul 2024 18:00:58 +0200 From: Valentin Caron To: Alexandre Belloni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alexandre Torgue CC: , , , , , Amelie Delaunay , Valentin Caron Subject: [PATCH v3 0/4] rtc: stm32: add pinctrl interface to handle RTC outs Date: Mon, 22 Jul 2024 18:00:18 +0200 Message-ID: <20240722160022.454226-1-valentin.caron@foss.st.com> X-Mailer: git-send-email 2.25.1 Precedence: bulk X-Mailing-List: linux-rtc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SHFCAS1NODE2.st.com (10.75.129.73) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-07-22_10,2024-07-22_01,2024-05-17_01 This series adds a pinctrl/pinmux interface to control STM32 RTC outputs. Theses two signals output are possible: - LSCO (Low Speed Clock Output) that allow to output LSE clock on a pin. On STM32MPU Discovery boards, this feature is used to generate a clock to Wifi/Bluetooth module. - Alarm out that allow to send a pulse on a pin when alarm A of the RTC expires. First attempt [1] was based on 'st,' vendor properties, this one is based on pinctrl and pinmux framework. As device-trees will be upstreamed separately, here is an example: stm32-pinctrl { rtc_rsvd_pins_a: rtc-rsvd-0 { pins { pinmux = , /* OUT2 */ ; /* OUT2_RMP */ }; }; }; stm32-rtc { pinctrl-0 = <&rtc_rsvd_pins_a &rtc_alarma_pins_a>; /* Enable by foo-device */ rtc_lsco_pins_a: rtc-lsco-0 { pins = "out2_rmp"; function = "lsco"; }; /* Enable by stm32-rtc hog */ rtc_alarma_pins_a: rtc-alarma-0 { pins = "out2"; function = "alarm-a"; }; }; foo-device { pinctrl-0 = <&rtc_lsco_pins_a>; }; [1] https://lore.kernel.org/linux-arm-kernel/20220504130617.331290-5-valentin.caron@foss.st.com/t/#m37935e92315e22bbe085775096175afc05b7ff09 Since v2: - Modify Kconfig after (a lot of) robots alert: + https://lore.kernel.org/oe-kbuild-all/202407190654.I3RI7WfP-lkp@intel.com/ + https://lore.kernel.org/oe-kbuild-all/202407191258.1oitwwMV-lkp@intel.com/ + https://lore.kernel.org/oe-kbuild-all/202407200400.NnW2fJ0q-lkp@intel.com/ + https://lore.kernel.org/oe-kbuild-all/202407181525.BRNKqmNf-lkp@intel.com/ + https://lore.kernel.org/oe-kbuild-all/202407191830.8bh5dJ09-lkp@intel.com/ Make RTC_DRV_STM32 depends on OF, PINCTRL and COMMON_CLK as they are menuconfig entry. Make RTC_DRV_STM32 select PINCONF, PINCONF_GENERIC and PINMUX as they config entry. Since v1: - Select PINMUX and PINCONF_GENERIC to solve: https://lore.kernel.org/oe-kbuild-all/202407130943.ie6n2Orh-lkp@intel.com/ - Make stm32_rtc_pinctrl_pins as static to solve: https://lore.kernel.org/oe-kbuild-all/202407130612.OEicZbNE-lkp@intel.com/ - Change "depends on" to "select" COMMON_CLK config - Modify regex in dt-binding to avoid properties like "rtc--123" as valid ones. Valentin Caron (4): dt-bindings: rtc: stm32: describe pinmux nodes rtc: stm32: add pinctrl and pinmux interfaces rtc: stm32: add Low Speed Clock Output (LSCO) support rtc: stm32: add alarm A out feature .../devicetree/bindings/rtc/st,stm32-rtc.yaml | 28 ++ drivers/rtc/Kconfig | 6 + drivers/rtc/rtc-stm32.c | 281 ++++++++++++++++++ 3 files changed, 315 insertions(+)