@@ -39,7 +39,7 @@
#include "hw/misc/unimp.h"
#include "hw/misc/aspeed_peci.h"
#include "hw/fsi/aspeed_apb2opb.h"
-#include "hw/char/serial.h"
+#include "hw/char/serial-mm.h"
#include "hw/intc/arm_gicv3.h"
#define ASPEED_SPIS_NUM 2
@@ -29,7 +29,7 @@
#define HW_MCHP_PFSOC_MMUART_H
#include "hw/sysbus.h"
-#include "hw/char/serial.h"
+#include "hw/char/serial-mm.h"
#define MCHP_PFSOC_MMUART_REG_COUNT 13
new file mode 100644
@@ -0,0 +1,52 @@
+/*
+ * QEMU 16550A UART emulation
+ *
+ * Copyright (c) 2003-2004 Fabrice Bellard
+ * Copyright (c) 2008 Citrix Systems, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef HW_SERIAL_MM_H
+#define HW_SERIAL_MM_H
+
+#include "hw/char/serial.h"
+#include "exec/memory.h"
+#include "chardev/char.h"
+#include "hw/sysbus.h"
+#include "qom/object.h"
+
+#define TYPE_SERIAL_MM "serial-mm"
+OBJECT_DECLARE_SIMPLE_TYPE(SerialMM, SERIAL_MM)
+
+struct SerialMM {
+ SysBusDevice parent;
+
+ SerialState serial;
+
+ uint8_t regshift;
+ uint8_t endianness;
+};
+
+SerialMM *serial_mm_init(MemoryRegion *address_space,
+ hwaddr base, int regshift,
+ qemu_irq irq, int baudbase,
+ Chardev *chr, enum device_endian end);
+
+#endif
@@ -29,8 +29,6 @@
#include "chardev/char-fe.h"
#include "exec/memory.h"
#include "qemu/fifo8.h"
-#include "chardev/char.h"
-#include "hw/sysbus.h"
#include "qom/object.h"
#define UART_FIFO_LENGTH 16 /* 16550A Fifo Length */
@@ -81,15 +79,6 @@ struct SerialState {
};
typedef struct SerialState SerialState;
-struct SerialMM {
- SysBusDevice parent;
-
- SerialState serial;
-
- uint8_t regshift;
- uint8_t endianness;
-};
-
extern const VMStateDescription vmstate_serial;
extern const MemoryRegionOps serial_io_ops;
@@ -98,12 +87,4 @@ void serial_set_frequency(SerialState *s, uint32_t frequency);
#define TYPE_SERIAL "serial"
OBJECT_DECLARE_SIMPLE_TYPE(SerialState, SERIAL)
-#define TYPE_SERIAL_MM "serial-mm"
-OBJECT_DECLARE_SIMPLE_TYPE(SerialMM, SERIAL_MM)
-
-SerialMM *serial_mm_init(MemoryRegion *address_space,
- hwaddr base, int regshift,
- qemu_irq irq, int baudbase,
- Chardev *chr, enum device_endian end);
-
#endif
@@ -18,7 +18,7 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "qemu/module.h"
-#include "hw/char/serial.h"
+#include "hw/char/serial-mm.h"
#include "hw/sysbus.h"
#include "hw/arm/allwinner-a10.h"
#include "hw/misc/unimp.h"
@@ -24,7 +24,7 @@
#include "qemu/units.h"
#include "hw/qdev-core.h"
#include "hw/sysbus.h"
-#include "hw/char/serial.h"
+#include "hw/char/serial-mm.h"
#include "hw/misc/unimp.h"
#include "hw/usb/hcd-ehci.h"
#include "hw/loader.h"
@@ -26,7 +26,7 @@
#include "hw/boards.h"
#include "hw/qdev-core.h"
#include "hw/sysbus.h"
-#include "hw/char/serial.h"
+#include "hw/char/serial-mm.h"
#include "hw/misc/unimp.h"
#include "hw/usb/hcd-ehci.h"
#include "hw/loader.h"
@@ -15,7 +15,7 @@
#include "qapi/error.h"
#include "hw/misc/unimp.h"
#include "hw/arm/aspeed_soc.h"
-#include "hw/char/serial.h"
+#include "hw/char/serial-mm.h"
#include "qemu/module.h"
#include "qemu/error-report.h"
#include "hw/i2c/aspeed_i2c.h"
@@ -15,7 +15,7 @@
#include "hw/qdev-properties.h"
#include "hw/misc/unimp.h"
#include "hw/arm/aspeed_soc.h"
-#include "hw/char/serial.h"
+#include "hw/char/serial-mm.h"
const char *aspeed_soc_cpu_type(AspeedSoCClass *sc)
@@ -22,7 +22,7 @@
#include "exec/address-spaces.h"
#include "net/net.h"
#include "hw/net/lan9118.h"
-#include "hw/char/serial.h"
+#include "hw/char/serial-mm.h"
#include "sysemu/qtest.h"
#include "sysemu/sysemu.h"
#include "qemu/cutils.h"
@@ -26,7 +26,7 @@
#include "qemu/units.h"
#include "qapi/error.h"
#include "exec/address-spaces.h"
-#include "hw/char/serial.h"
+#include "hw/char/serial-mm.h"
#include "hw/arm/msf2-soc.h"
#include "hw/misc/unimp.h"
#include "hw/qdev-clock.h"
@@ -18,7 +18,7 @@
#include "net/net.h"
#include "sysemu/sysemu.h"
#include "hw/boards.h"
-#include "hw/char/serial.h"
+#include "hw/char/serial-mm.h"
#include "qemu/timer.h"
#include "hw/ptimer.h"
#include "hw/qdev-properties.h"
@@ -18,7 +18,7 @@
#include "hw/arm/boot.h"
#include "hw/arm/npcm7xx.h"
-#include "hw/char/serial.h"
+#include "hw/char/serial-mm.h"
#include "hw/loader.h"
#include "hw/misc/unimp.h"
#include "hw/qdev-clock.h"
@@ -17,7 +17,7 @@
#include "migration/vmstate.h"
#include "hw/arm/pxa.h"
#include "sysemu/sysemu.h"
-#include "hw/char/serial.h"
+#include "hw/char/serial-mm.h"
#include "hw/i2c/i2c.h"
#include "hw/irq.h"
#include "hw/qdev-properties.h"
@@ -20,7 +20,7 @@
#include "qemu/osdep.h"
#include "chardev/char.h"
#include "hw/arm/omap.h"
-#include "hw/char/serial.h"
+#include "hw/char/serial-mm.h"
#include "exec/address-spaces.h"
/* UARTs */
new file mode 100644
@@ -0,0 +1,157 @@
+/*
+ * QEMU 16550A UART emulation
+ *
+ * Copyright (c) 2003-2004 Fabrice Bellard
+ * Copyright (c) 2008 Citrix Systems, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "qemu/osdep.h"
+#include "hw/char/serial-mm.h"
+#include "exec/cpu-common.h"
+#include "migration/vmstate.h"
+#include "qapi/error.h"
+#include "hw/qdev-properties.h"
+
+static uint64_t serial_mm_read(void *opaque, hwaddr addr, unsigned size)
+{
+ SerialMM *s = SERIAL_MM(opaque);
+ return serial_io_ops.read(&s->serial, addr >> s->regshift, 1);
+}
+
+static void serial_mm_write(void *opaque, hwaddr addr,
+ uint64_t value, unsigned size)
+{
+ SerialMM *s = SERIAL_MM(opaque);
+ value &= 255;
+ serial_io_ops.write(&s->serial, addr >> s->regshift, value, 1);
+}
+
+static const MemoryRegionOps serial_mm_ops[3] = {
+ [DEVICE_NATIVE_ENDIAN] = {
+ .read = serial_mm_read,
+ .write = serial_mm_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
+ .valid.max_access_size = 8,
+ .impl.max_access_size = 8,
+ },
+ [DEVICE_LITTLE_ENDIAN] = {
+ .read = serial_mm_read,
+ .write = serial_mm_write,
+ .endianness = DEVICE_LITTLE_ENDIAN,
+ .valid.max_access_size = 8,
+ .impl.max_access_size = 8,
+ },
+ [DEVICE_BIG_ENDIAN] = {
+ .read = serial_mm_read,
+ .write = serial_mm_write,
+ .endianness = DEVICE_BIG_ENDIAN,
+ .valid.max_access_size = 8,
+ .impl.max_access_size = 8,
+ },
+};
+
+static void serial_mm_realize(DeviceState *dev, Error **errp)
+{
+ SerialMM *smm = SERIAL_MM(dev);
+ SerialState *s = &smm->serial;
+
+ if (!qdev_realize(DEVICE(s), NULL, errp)) {
+ return;
+ }
+
+ memory_region_init_io(&s->io, OBJECT(dev),
+ &serial_mm_ops[smm->endianness], smm, "serial",
+ 8 << smm->regshift);
+ sysbus_init_mmio(SYS_BUS_DEVICE(smm), &s->io);
+ sysbus_init_irq(SYS_BUS_DEVICE(smm), &smm->serial.irq);
+}
+
+static const VMStateDescription vmstate_serial_mm = {
+ .name = "serial",
+ .version_id = 3,
+ .minimum_version_id = 2,
+ .fields = (const VMStateField[]) {
+ VMSTATE_STRUCT(serial, SerialMM, 0, vmstate_serial, SerialState),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
+SerialMM *serial_mm_init(MemoryRegion *address_space,
+ hwaddr base, int regshift,
+ qemu_irq irq, int baudbase,
+ Chardev *chr, enum device_endian end)
+{
+ SerialMM *smm = SERIAL_MM(qdev_new(TYPE_SERIAL_MM));
+ MemoryRegion *mr;
+
+ qdev_prop_set_uint8(DEVICE(smm), "regshift", regshift);
+ qdev_prop_set_uint32(DEVICE(smm), "baudbase", baudbase);
+ qdev_prop_set_chr(DEVICE(smm), "chardev", chr);
+ qdev_set_legacy_instance_id(DEVICE(smm), base, 2);
+ qdev_prop_set_uint8(DEVICE(smm), "endianness", end);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(smm), &error_fatal);
+
+ sysbus_connect_irq(SYS_BUS_DEVICE(smm), 0, irq);
+ mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(smm), 0);
+ memory_region_add_subregion(address_space, base, mr);
+
+ return smm;
+}
+
+static void serial_mm_instance_init(Object *o)
+{
+ SerialMM *smm = SERIAL_MM(o);
+
+ object_initialize_child(o, "serial", &smm->serial, TYPE_SERIAL);
+
+ qdev_alias_all_properties(DEVICE(&smm->serial), o);
+}
+
+static Property serial_mm_properties[] = {
+ /*
+ * Set the spacing between adjacent memory-mapped UART registers.
+ * Each register will be at (1 << regshift) bytes after the previous one.
+ */
+ DEFINE_PROP_UINT8("regshift", SerialMM, regshift, 0),
+ DEFINE_PROP_UINT8("endianness", SerialMM, endianness, DEVICE_NATIVE_ENDIAN),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void serial_mm_class_init(ObjectClass *oc, void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(oc);
+
+ device_class_set_props(dc, serial_mm_properties);
+ dc->realize = serial_mm_realize;
+ dc->vmsd = &vmstate_serial_mm;
+}
+
+static const TypeInfo types[] = {
+ {
+ .name = TYPE_SERIAL_MM,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .class_init = serial_mm_class_init,
+ .instance_init = serial_mm_instance_init,
+ .instance_size = sizeof(SerialMM),
+ },
+};
+
+DEFINE_TYPES(types)
@@ -996,135 +996,9 @@ static const TypeInfo serial_info = {
.class_init = serial_class_init,
};
-/* Memory mapped interface */
-static uint64_t serial_mm_read(void *opaque, hwaddr addr,
- unsigned size)
-{
- SerialMM *s = SERIAL_MM(opaque);
- return serial_ioport_read(&s->serial, addr >> s->regshift, 1);
-}
-
-static void serial_mm_write(void *opaque, hwaddr addr,
- uint64_t value, unsigned size)
-{
- SerialMM *s = SERIAL_MM(opaque);
- value &= 255;
- serial_ioport_write(&s->serial, addr >> s->regshift, value, 1);
-}
-
-static const MemoryRegionOps serial_mm_ops[3] = {
- [DEVICE_NATIVE_ENDIAN] = {
- .read = serial_mm_read,
- .write = serial_mm_write,
- .endianness = DEVICE_NATIVE_ENDIAN,
- .valid.max_access_size = 8,
- .impl.max_access_size = 8,
- },
- [DEVICE_LITTLE_ENDIAN] = {
- .read = serial_mm_read,
- .write = serial_mm_write,
- .endianness = DEVICE_LITTLE_ENDIAN,
- .valid.max_access_size = 8,
- .impl.max_access_size = 8,
- },
- [DEVICE_BIG_ENDIAN] = {
- .read = serial_mm_read,
- .write = serial_mm_write,
- .endianness = DEVICE_BIG_ENDIAN,
- .valid.max_access_size = 8,
- .impl.max_access_size = 8,
- },
-};
-
-static void serial_mm_realize(DeviceState *dev, Error **errp)
-{
- SerialMM *smm = SERIAL_MM(dev);
- SerialState *s = &smm->serial;
-
- if (!qdev_realize(DEVICE(s), NULL, errp)) {
- return;
- }
-
- memory_region_init_io(&s->io, OBJECT(dev),
- &serial_mm_ops[smm->endianness], smm, "serial",
- 8 << smm->regshift);
- sysbus_init_mmio(SYS_BUS_DEVICE(smm), &s->io);
- sysbus_init_irq(SYS_BUS_DEVICE(smm), &smm->serial.irq);
-}
-
-static const VMStateDescription vmstate_serial_mm = {
- .name = "serial",
- .version_id = 3,
- .minimum_version_id = 2,
- .fields = (const VMStateField[]) {
- VMSTATE_STRUCT(serial, SerialMM, 0, vmstate_serial, SerialState),
- VMSTATE_END_OF_LIST()
- }
-};
-
-SerialMM *serial_mm_init(MemoryRegion *address_space,
- hwaddr base, int regshift,
- qemu_irq irq, int baudbase,
- Chardev *chr, enum device_endian end)
-{
- SerialMM *smm = SERIAL_MM(qdev_new(TYPE_SERIAL_MM));
- MemoryRegion *mr;
-
- qdev_prop_set_uint8(DEVICE(smm), "regshift", regshift);
- qdev_prop_set_uint32(DEVICE(smm), "baudbase", baudbase);
- qdev_prop_set_chr(DEVICE(smm), "chardev", chr);
- qdev_set_legacy_instance_id(DEVICE(smm), base, 2);
- qdev_prop_set_uint8(DEVICE(smm), "endianness", end);
- sysbus_realize_and_unref(SYS_BUS_DEVICE(smm), &error_fatal);
-
- sysbus_connect_irq(SYS_BUS_DEVICE(smm), 0, irq);
- mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(smm), 0);
- memory_region_add_subregion(address_space, base, mr);
-
- return smm;
-}
-
-static void serial_mm_instance_init(Object *o)
-{
- SerialMM *smm = SERIAL_MM(o);
-
- object_initialize_child(o, "serial", &smm->serial, TYPE_SERIAL);
-
- qdev_alias_all_properties(DEVICE(&smm->serial), o);
-}
-
-static Property serial_mm_properties[] = {
- /*
- * Set the spacing between adjacent memory-mapped UART registers.
- * Each register will be at (1 << regshift) bytes after the
- * previous one.
- */
- DEFINE_PROP_UINT8("regshift", SerialMM, regshift, 0),
- DEFINE_PROP_UINT8("endianness", SerialMM, endianness, DEVICE_NATIVE_ENDIAN),
- DEFINE_PROP_END_OF_LIST(),
-};
-
-static void serial_mm_class_init(ObjectClass *oc, void *data)
-{
- DeviceClass *dc = DEVICE_CLASS(oc);
-
- device_class_set_props(dc, serial_mm_properties);
- dc->realize = serial_mm_realize;
- dc->vmsd = &vmstate_serial_mm;
-}
-
-static const TypeInfo serial_mm_info = {
- .name = TYPE_SERIAL_MM,
- .parent = TYPE_SYS_BUS_DEVICE,
- .class_init = serial_mm_class_init,
- .instance_init = serial_mm_instance_init,
- .instance_size = sizeof(SerialMM),
-};
-
static void serial_register_types(void)
{
type_register_static(&serial_info);
- type_register_static(&serial_mm_info);
}
type_init(serial_register_types)
@@ -29,7 +29,7 @@
#include "qemu/log.h"
#include "qemu/module.h"
#include "hw/usb/hcd-ohci.h"
-#include "hw/char/serial.h"
+#include "hw/char/serial-mm.h"
#include "ui/console.h"
#include "hw/sysbus.h"
#include "migration/vmstate.h"
@@ -17,7 +17,7 @@
#include "sysemu/runstate.h"
#include "hw/rtc/mc146818rtc.h"
#include "hw/timer/i8254.h"
-#include "hw/char/serial.h"
+#include "hw/char/serial-mm.h"
#include "hw/char/parallel.h"
#include "hw/intc/i8259.h"
#include "hw/input/lasips2.h"
@@ -9,7 +9,7 @@
#include "qemu/datadir.h"
#include "qapi/error.h"
#include "hw/boards.h"
-#include "hw/char/serial.h"
+#include "hw/char/serial-mm.h"
#include "sysemu/kvm.h"
#include "sysemu/tcg.h"
#include "sysemu/sysemu.h"
@@ -34,7 +34,7 @@
#include "hw/block/flash.h"
#include "sysemu/sysemu.h"
#include "hw/boards.h"
-#include "hw/char/serial.h"
+#include "hw/char/serial-mm.h"
#include "hw/qdev-properties.h"
#include "exec/address-spaces.h"
#include "hw/ssi/ssi.h"
@@ -22,7 +22,7 @@
#include "elf.h"
#include "hw/boards.h"
-#include "hw/char/serial.h"
+#include "hw/char/serial-mm.h"
#include "hw/ide/pci.h"
#include "hw/ide/ahci-pci.h"
#include "hw/loader.h"
@@ -28,7 +28,7 @@
#include "hw/mips/mips.h"
#include "hw/intc/i8259.h"
#include "hw/dma/i8257.h"
-#include "hw/char/serial.h"
+#include "hw/char/serial-mm.h"
#include "hw/char/parallel.h"
#include "hw/isa/isa.h"
#include "hw/block/fdc.h"
@@ -29,7 +29,7 @@
#include "qemu/datadir.h"
#include "qapi/error.h"
#include "elf.h"
-#include "hw/char/serial.h"
+#include "hw/char/serial-mm.h"
#include "hw/intc/loongson_liointc.h"
#include "hw/mips/mips.h"
#include "hw/mips/fw_cfg.h"
@@ -31,7 +31,7 @@
#include "hw/clock.h"
#include "hw/southbridge/piix.h"
#include "hw/isa/superio.h"
-#include "hw/char/serial.h"
+#include "hw/char/serial-mm.h"
#include "net/net.h"
#include "hw/boards.h"
#include "hw/i2c/smbus_eeprom.h"
@@ -31,7 +31,7 @@
#include "exec/address-spaces.h"
#include "hw/clock.h"
#include "hw/mips/mips.h"
-#include "hw/char/serial.h"
+#include "hw/char/serial-mm.h"
#include "net/net.h"
#include "sysemu/sysemu.h"
#include "hw/boards.h"
@@ -24,7 +24,7 @@
#include "cpu.h"
#include "hw/irq.h"
#include "hw/boards.h"
-#include "hw/char/serial.h"
+#include "hw/char/serial-mm.h"
#include "net/net.h"
#include "hw/openrisc/boot.h"
#include "hw/qdev-properties.h"
@@ -14,7 +14,7 @@
#include "exec/address-spaces.h"
#include "hw/irq.h"
#include "hw/boards.h"
-#include "hw/char/serial.h"
+#include "hw/char/serial-mm.h"
#include "hw/core/split-irq.h"
#include "hw/openrisc/boot.h"
#include "hw/misc/sifive_test.h"
@@ -24,7 +24,7 @@
#include "net/net.h"
#include "qemu/config-file.h"
#include "hw/block/flash.h"
-#include "hw/char/serial.h"
+#include "hw/char/serial-mm.h"
#include "hw/pci/pci.h"
#include "sysemu/block-backend-io.h"
#include "sysemu/sysemu.h"
@@ -32,7 +32,7 @@
#include "hw/irq.h"
#include "hw/qdev-properties.h"
#include "ppc405.h"
-#include "hw/char/serial.h"
+#include "hw/char/serial-mm.h"
#include "qemu/timer.h"
#include "sysemu/reset.h"
#include "sysemu/sysemu.h"
@@ -23,7 +23,7 @@
#include "sysemu/device_tree.h"
#include "hw/loader.h"
#include "elf.h"
-#include "hw/char/serial.h"
+#include "hw/char/serial-mm.h"
#include "hw/ppc/ppc.h"
#include "hw/pci-host/ppc4xx.h"
#include "sysemu/sysemu.h"
@@ -31,7 +31,7 @@
#include "sysemu/sysemu.h"
#include "sysemu/reset.h"
#include "hw/sysbus.h"
-#include "hw/char/serial.h"
+#include "hw/char/serial-mm.h"
#include "hw/i2c/ppc4xx_i2c.h"
#include "hw/i2c/smbus_eeprom.h"
#include "hw/ide/pci.h"
@@ -28,7 +28,7 @@
#include "exec/page-protection.h"
#include "cpu.h"
#include "hw/sysbus.h"
-#include "hw/char/serial.h"
+#include "hw/char/serial-mm.h"
#include "hw/block/flash.h"
#include "sysemu/sysemu.h"
#include "sysemu/reset.h"
@@ -27,7 +27,7 @@
#include "hw/loader.h"
#include "hw/sysbus.h"
#include "hw/qdev-properties.h"
-#include "hw/char/serial.h"
+#include "hw/char/serial-mm.h"
#include "target/riscv/cpu.h"
#include "hw/core/sysbus-fdt.h"
#include "target/riscv/pmu.h"
@@ -27,7 +27,7 @@
#include "qemu/units.h"
#include "cpu.h"
#include "hw/boards.h"
-#include "hw/char/serial.h"
+#include "hw/char/serial-mm.h"
#include "hw/misc/unimp.h"
#include "hw/loader.h"
#include "hw/sparc/sparc64.h"
@@ -34,8 +34,8 @@
#include "hw/pci/pci_host.h"
#include "hw/qdev-properties.h"
#include "hw/pci-host/sabre.h"
-#include "hw/char/serial.h"
#include "hw/char/serial-isa.h"
+#include "hw/char/serial-mm.h"
#include "hw/char/parallel-isa.h"
#include "hw/rtc/m48t59.h"
#include "migration/vmstate.h"
@@ -35,7 +35,7 @@
#include "hw/qdev-properties.h"
#include "elf.h"
#include "exec/memory.h"
-#include "hw/char/serial.h"
+#include "hw/char/serial-mm.h"
#include "net/net.h"
#include "hw/sysbus.h"
#include "hw/block/flash.h"
@@ -136,7 +136,7 @@ config MUSICPAL
select MARVELL_88W8618
select PTIMER
select PFLASH_CFI02
- select SERIAL
+ select SERIAL_MM
select WM8750
config NETDUINO2
@@ -179,13 +179,13 @@ config OMAP
select NAND
select PFLASH_CFI01
select SD
- select SERIAL
+ select SERIAL_MM
config PXA2XX
bool
select FRAMEBUFFER
select I2C
- select SERIAL
+ select SERIAL_MM
select SD
select SSI
select USB_OHCI_SYSBUS
@@ -399,7 +399,7 @@ config ALLWINNER_A10
select ALLWINNER_EMAC
select ALLWINNER_I2C
select AXP2XX_PMU
- select SERIAL
+ select SERIAL_MM
select UNIMP
select USB_OHCI_SYSBUS
@@ -411,7 +411,7 @@ config ALLWINNER_H3
select ALLWINNER_SUN8I_EMAC
select ALLWINNER_I2C
select ALLWINNER_WDT
- select SERIAL
+ select SERIAL_MM
select ARM_TIMER
select ARM_GIC
select UNIMP
@@ -427,7 +427,7 @@ config ALLWINNER_R40
select ALLWINNER_A10_PIT
select ALLWINNER_WDT
select AXP2XX_PMU
- select SERIAL
+ select SERIAL_MM
select ARM_TIMER
select ARM_GIC
select UNIMP
@@ -542,7 +542,7 @@ config NPCM7XX
select ISL_PMBUS_VR
select PL310 # cache controller
select PMBUS
- select SERIAL
+ select SERIAL_MM
select SSI
select UNIMP
select PCA954X
@@ -564,7 +564,7 @@ config FSL_IMX31
default y
depends on TCG && ARM
imply I2C_DEVICES
- select SERIAL
+ select SERIAL_MM
select IMX
select IMX_I2C
select WDT_IMX2
@@ -593,7 +593,7 @@ config ASPEED_SOC
select I2C
select DPS310
select PCA9552
- select SERIAL
+ select SERIAL_MM
select SMBUS_EEPROM
select PCA954X
select SSI
@@ -681,7 +681,7 @@ config MSF2
bool
select ARM_V7M
select PTIMER
- select SERIAL
+ select SERIAL_MM
select SSI
select UNIMP
@@ -21,6 +21,10 @@ config SERIAL_ISA
depends on ISA_BUS
select SERIAL
+config SERIAL_MM
+ bool
+ select SERIAL
+
config SERIAL_PCI
bool
default y if PCI_DEVICES
@@ -14,6 +14,7 @@ system_ss.add(when: 'CONFIG_PL011', if_true: files('pl011.c'))
system_ss.add(when: 'CONFIG_SCLPCONSOLE', if_true: files('sclpconsole.c', 'sclpconsole-lm.c'))
system_ss.add(when: 'CONFIG_SERIAL', if_true: files('serial.c'))
system_ss.add(when: 'CONFIG_SERIAL_ISA', if_true: files('serial-isa.c'))
+system_ss.add(when: 'CONFIG_SERIAL_MM', if_true: files('serial-mm.c'))
system_ss.add(when: 'CONFIG_SERIAL_PCI', if_true: files('serial-pci.c'))
system_ss.add(when: 'CONFIG_SERIAL_PCI_MULTI', if_true: files('serial-pci-multi.c'))
system_ss.add(when: 'CONFIG_SHAKTI_UART', if_true: files('shakti_uart.c'))
@@ -76,7 +76,7 @@ config SM501
bool
select I2C
select DDC
- select SERIAL
+ select SERIAL_MM
select USB_OHCI_SYSBUS
config TCX
@@ -9,7 +9,7 @@ config HPPA_B160L
select ASTRO
select DINO
select LASI
- select SERIAL
+ select SERIAL_MM
select SERIAL_PCI
select ISA_BUS
select I8259
@@ -9,7 +9,7 @@ config LOONGARCH_VIRT
imply PCI_DEVICES
imply NVDIMM
imply TPM_TIS_SYSBUS
- select SERIAL
+ select SERIAL_MM
select VIRTIO_PCI
select PLATFORM_BUS
select LOONGARCH_IPI
@@ -13,7 +13,7 @@ config PETALOGIX_ML605
default y
depends on MICROBLAZE
select PFLASH_CFI01
- select SERIAL
+ select SERIAL_MM
select SSI_M25P80
select XILINX
select XILINX_AXI
@@ -10,14 +10,14 @@ config MALTA
select MIPS_CPS
select PIIX
select PFLASH_CFI01
- select SERIAL
+ select SERIAL_MM
select SMBUS_EEPROM
config MIPSSIM
bool
default y
depends on MIPS
- select SERIAL
+ select SERIAL_MM
select MIPSNET
config JAZZ
@@ -37,7 +37,7 @@ config JAZZ
select FDC_SYSBUS
select MC146818RTC
select PCKBD
- select SERIAL
+ select SERIAL_MM
select PARALLEL
select DS1225Y
select JAZZ_LED
@@ -65,7 +65,7 @@ config LOONGSON3V
imply VIRTIO_VGA
imply QXL if SPICE
imply USB_OHCI_PCI
- select SERIAL
+ select SERIAL_MM
select GOLDFISH_RTC
select LOONGSON_IPI
select LOONGSON_LIOINTC
@@ -89,7 +89,7 @@ config MIPS_BOSTON
select MIPS_CPS
select PCI_EXPRESS_XILINX
select AHCI_ICH9
- select SERIAL
+ select SERIAL_MM
config FW_CFG_MIPS
bool
@@ -3,7 +3,7 @@ config OR1K_SIM
default y
depends on OPENRISC
select DEVICE_TREE
- select SERIAL
+ select SERIAL_MM
select OPENCORES_ETH
select OMPIC
select SPLIT_IRQ
@@ -19,6 +19,6 @@ config OR1K_VIRT
select PCI
select PCI_EXPRESS_GENERIC_BRIDGE
select GOLDFISH_RTC
- select SERIAL
+ select SERIAL_MM
select SIFIVE_TEST
select VIRTIO_MMIO
@@ -51,7 +51,7 @@ config PPC405
select M48T59
select PFLASH_CFI02
select PPC4XX
- select SERIAL
+ select SERIAL_MM
config PPC440
bool
@@ -63,7 +63,7 @@ config PPC440
select PCI_EXPRESS
select PPC440_PCIX
select PPC4XX
- select SERIAL
+ select SERIAL_MM
select FDT_PPC
config PPC4XX
@@ -80,7 +80,7 @@ config SAM460EX
select IDE_SII3112
select M41T80
select PPC440
- select SERIAL
+ select SERIAL_MM
select SM501
select SMBUS_EEPROM
select USB_EHCI_SYSBUS
@@ -163,7 +163,7 @@ config E500
select PLATFORM_BUS
select PPCE500_PCI
select SDHCI
- select SERIAL
+ select SERIAL_MM
select MPC_I2C
select FDT_PPC
select DS1338
@@ -187,7 +187,7 @@ config VIRTEX
depends on PPC && FDT
select PPC4XX
select PFLASH_CFI01
- select SERIAL
+ select SERIAL_MM
select XILINX
select XILINX_ETHLITE
select FDT_PPC
@@ -44,7 +44,7 @@ config RISCV_VIRT
select PCI
select PCI_EXPRESS_GENERIC_BRIDGE
select PFLASH_CFI01
- select SERIAL
+ select SERIAL_MM
select RISCV_ACLINT
select RISCV_APLIC
select RISCV_IMSIC
@@ -10,6 +10,7 @@ config SUN4U
select ISA_BUS
select FDC_ISA
select SERIAL_ISA
+ select SERIAL_MM
select PCI_SABRE
select IDE_CMD646
select PCKBD
@@ -18,4 +18,4 @@ config XTENSA_XTFPGA
select DEVICE_TREE
select OPENCORES_ETH
select PFLASH_CFI01
- select SERIAL
+ select SERIAL_MM