@@ -279,6 +279,10 @@ You can change the multiplier and divider of a clock at runtime,
so you can use this to model clock controller devices which
have guest-programmable frequency multipliers or dividers.
+Similary to ``clock_set()``, ``clock_set_mul_div()`` returns ``true`` if
+the clock state was modified; that is, if the multiplier or the diviser
+or both were changed by the call.
+
Note that ``clock_set_mul_div()`` does not automatically call
``clock_propagate()``. If you make a runtime change to the
multiplier or divider you must call clock_propagate() yourself.
@@ -357,6 +357,8 @@ char *clock_display_freq(Clock *clk);
* @multiplier: multiplier value
* @divider: divider value
*
+ * @return: true if the clock is changed.
+ *
* By default, a Clock's children will all run with the same period
* as their parent. This function allows you to adjust the multiplier
* and divider used to derive the child clock frequency.
@@ -374,6 +376,6 @@ char *clock_display_freq(Clock *clk);
* Note that this function does not call clock_propagate(); the
* caller should do that if necessary.
*/
-void clock_set_mul_div(Clock *clk, uint32_t multiplier, uint32_t divider);
+bool clock_set_mul_div(Clock *clk, uint32_t multiplier, uint32_t divider);
#endif /* QEMU_HW_CLOCK_H */
@@ -143,14 +143,20 @@ char *clock_display_freq(Clock *clk)
return freq_to_str(clock_get_hz(clk));
}
-void clock_set_mul_div(Clock *clk, uint32_t multiplier, uint32_t divider)
+bool clock_set_mul_div(Clock *clk, uint32_t multiplier, uint32_t divider)
{
assert(divider != 0);
+ if (clk->multiplier == multiplier && clk->divider == divider) {
+ return false;
+ }
+
trace_clock_set_mul_div(CLOCK_PATH(clk), clk->multiplier, multiplier,
clk->divider, divider);
clk->multiplier = multiplier;
clk->divider = divider;
+
+ return true;
}
static void clock_initfn(Object *obj)