| Message ID | 20240311185200.2185753-6-npiggin@gmail.com |
|---|---|
| State | Not Applicable |
| Headers | show |
| Series | misc ppc patches | expand |
On 3/12/24 00:21, Nicholas Piggin wrote: > "MMR" and "SPR SO" are not implemented in POWER9, so clear those bits. > HTM is not set by default, and only later if the cap is set, so remove > the comment that suggests otherwise. > > Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Reviewed-by: Harsh Prateek Bora <harshpb@linux.ibm.com> > --- > hw/ppc/spapr.c | 10 +++++----- > 1 file changed, 5 insertions(+), 5 deletions(-) > > diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c > index 7d7da30f60..247f920f07 100644 > --- a/hw/ppc/spapr.c > +++ b/hw/ppc/spapr.c > @@ -248,14 +248,14 @@ static void spapr_dt_pa_features(SpaprMachineState *spapr, > 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, /* 6 - 11 */ > /* 16: Vector */ > 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, /* 12 - 17 */ > - /* 18: Vec. Scalar, 20: Vec. XOR, 22: HTM */ > + /* 18: Vec. Scalar, 20: Vec. XOR */ > 0x80, 0x00, 0x80, 0x00, 0x00, 0x00, /* 18 - 23 */ > /* 24: Ext. Dec, 26: 64 bit ftrs, 28: PM ftrs */ > 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 24 - 29 */ > - /* 30: MMR, 32: LE atomic, 34: EBB + ext EBB */ > - 0x80, 0x00, 0x80, 0x00, 0xC0, 0x00, /* 30 - 35 */ > - /* 36: SPR SO, 40: Radix MMU */ > - 0x80, 0x00, 0x00, 0x00, 0x80, 0x00, /* 36 - 41 */ > + /* 32: LE atomic, 34: EBB + ext EBB */ > + 0x00, 0x00, 0x80, 0x00, 0xC0, 0x00, /* 30 - 35 */ > + /* 40: Radix MMU */ > + 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, /* 36 - 41 */ > /* 42: PM, 44: PC RA, 46: SC vec'd */ > 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 42 - 47 */ > /* 48: SIMD, 50: QP BFP, 52: String */
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 7d7da30f60..247f920f07 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -248,14 +248,14 @@ static void spapr_dt_pa_features(SpaprMachineState *spapr, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, /* 6 - 11 */ /* 16: Vector */ 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, /* 12 - 17 */ - /* 18: Vec. Scalar, 20: Vec. XOR, 22: HTM */ + /* 18: Vec. Scalar, 20: Vec. XOR */ 0x80, 0x00, 0x80, 0x00, 0x00, 0x00, /* 18 - 23 */ /* 24: Ext. Dec, 26: 64 bit ftrs, 28: PM ftrs */ 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 24 - 29 */ - /* 30: MMR, 32: LE atomic, 34: EBB + ext EBB */ - 0x80, 0x00, 0x80, 0x00, 0xC0, 0x00, /* 30 - 35 */ - /* 36: SPR SO, 40: Radix MMU */ - 0x80, 0x00, 0x00, 0x00, 0x80, 0x00, /* 36 - 41 */ + /* 32: LE atomic, 34: EBB + ext EBB */ + 0x00, 0x00, 0x80, 0x00, 0xC0, 0x00, /* 30 - 35 */ + /* 40: Radix MMU */ + 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, /* 36 - 41 */ /* 42: PM, 44: PC RA, 46: SC vec'd */ 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 42 - 47 */ /* 48: SIMD, 50: QP BFP, 52: String */
"MMR" and "SPR SO" are not implemented in POWER9, so clear those bits. HTM is not set by default, and only later if the cap is set, so remove the comment that suggests otherwise. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> --- hw/ppc/spapr.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-)