diff mbox series

pnv/xive2: Quiet down some error messages

Message ID 20230531150537.369350-1-fbarrat@linux.ibm.com
State Accepted
Headers show
Series pnv/xive2: Quiet down some error messages | expand

Commit Message

Frederic Barrat May 31, 2023, 3:05 p.m. UTC
When dumping the END and NVP tables ("info pic" from the HMP) on the
P10 model, we're likely to be flooded with error messages such as:

  XIVE[0] - VST: invalid NVPT entry f33800 !?

The error is printed when finding an empty VSD in an indirect
table (thus END and NVP tables with skiboot), which is going to happen
when dumping the xive state. So let's tune down those messages. They
can be re-enabled easily with a macro if needed.

Those errors were already hidden on xive/P9, for the same reason.

Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com>
---
 hw/intc/pnv_xive2.c | 4 ++++
 1 file changed, 4 insertions(+)

Comments

Cédric Le Goater May 31, 2023, 3:13 p.m. UTC | #1
On 5/31/23 17:05, Frederic Barrat wrote:
> When dumping the END and NVP tables ("info pic" from the HMP) on the
> P10 model, we're likely to be flooded with error messages such as:
> 
>    XIVE[0] - VST: invalid NVPT entry f33800 !?
> 
> The error is printed when finding an empty VSD in an indirect
> table (thus END and NVP tables with skiboot), which is going to happen
> when dumping the xive state. So let's tune down those messages. They
> can be re-enabled easily with a macro if needed.
> 
> Those errors were already hidden on xive/P9, for the same reason.

yes.

  
> Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com>


Reviewed-by: Cédric Le Goater <clg@kaod.org>

Thanks,

C.

> ---
>   hw/intc/pnv_xive2.c | 4 ++++
>   1 file changed, 4 insertions(+)
> 
> diff --git a/hw/intc/pnv_xive2.c b/hw/intc/pnv_xive2.c
> index c80316657a..397679390c 100644
> --- a/hw/intc/pnv_xive2.c
> +++ b/hw/intc/pnv_xive2.c
> @@ -163,7 +163,9 @@ static uint64_t pnv_xive2_vst_addr_indirect(PnvXive2 *xive, uint32_t type,
>       ldq_be_dma(&address_space_memory, vsd_addr, &vsd, MEMTXATTRS_UNSPECIFIED);
>   
>       if (!(vsd & VSD_ADDRESS_MASK)) {
> +#ifdef XIVE2_DEBUG
>           xive2_error(xive, "VST: invalid %s entry %x !?", info->name, idx);
> +#endif
>           return 0;
>       }
>   
> @@ -185,7 +187,9 @@ static uint64_t pnv_xive2_vst_addr_indirect(PnvXive2 *xive, uint32_t type,
>                      MEMTXATTRS_UNSPECIFIED);
>   
>           if (!(vsd & VSD_ADDRESS_MASK)) {
> +#ifdef XIVE2_DEBUG
>               xive2_error(xive, "VST: invalid %s entry %x !?", info->name, idx);
> +#endif
>               return 0;
>           }
>
Daniel Henrique Barboza June 1, 2023, 8:30 p.m. UTC | #2
Queued in gitlab.com/danielhb/qemu/tree/ppc-next. Thanks,


Daniel

On 5/31/23 12:05, Frederic Barrat wrote:
> When dumping the END and NVP tables ("info pic" from the HMP) on the
> P10 model, we're likely to be flooded with error messages such as:
> 
>    XIVE[0] - VST: invalid NVPT entry f33800 !?
> 
> The error is printed when finding an empty VSD in an indirect
> table (thus END and NVP tables with skiboot), which is going to happen
> when dumping the xive state. So let's tune down those messages. They
> can be re-enabled easily with a macro if needed.
> 
> Those errors were already hidden on xive/P9, for the same reason.
> 
> Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com>
> ---
>   hw/intc/pnv_xive2.c | 4 ++++
>   1 file changed, 4 insertions(+)
> 
> diff --git a/hw/intc/pnv_xive2.c b/hw/intc/pnv_xive2.c
> index c80316657a..397679390c 100644
> --- a/hw/intc/pnv_xive2.c
> +++ b/hw/intc/pnv_xive2.c
> @@ -163,7 +163,9 @@ static uint64_t pnv_xive2_vst_addr_indirect(PnvXive2 *xive, uint32_t type,
>       ldq_be_dma(&address_space_memory, vsd_addr, &vsd, MEMTXATTRS_UNSPECIFIED);
>   
>       if (!(vsd & VSD_ADDRESS_MASK)) {
> +#ifdef XIVE2_DEBUG
>           xive2_error(xive, "VST: invalid %s entry %x !?", info->name, idx);
> +#endif
>           return 0;
>       }
>   
> @@ -185,7 +187,9 @@ static uint64_t pnv_xive2_vst_addr_indirect(PnvXive2 *xive, uint32_t type,
>                      MEMTXATTRS_UNSPECIFIED);
>   
>           if (!(vsd & VSD_ADDRESS_MASK)) {
> +#ifdef XIVE2_DEBUG
>               xive2_error(xive, "VST: invalid %s entry %x !?", info->name, idx);
> +#endif
>               return 0;
>           }
>
diff mbox series

Patch

diff --git a/hw/intc/pnv_xive2.c b/hw/intc/pnv_xive2.c
index c80316657a..397679390c 100644
--- a/hw/intc/pnv_xive2.c
+++ b/hw/intc/pnv_xive2.c
@@ -163,7 +163,9 @@  static uint64_t pnv_xive2_vst_addr_indirect(PnvXive2 *xive, uint32_t type,
     ldq_be_dma(&address_space_memory, vsd_addr, &vsd, MEMTXATTRS_UNSPECIFIED);
 
     if (!(vsd & VSD_ADDRESS_MASK)) {
+#ifdef XIVE2_DEBUG
         xive2_error(xive, "VST: invalid %s entry %x !?", info->name, idx);
+#endif
         return 0;
     }
 
@@ -185,7 +187,9 @@  static uint64_t pnv_xive2_vst_addr_indirect(PnvXive2 *xive, uint32_t type,
                    MEMTXATTRS_UNSPECIFIED);
 
         if (!(vsd & VSD_ADDRESS_MASK)) {
+#ifdef XIVE2_DEBUG
             xive2_error(xive, "VST: invalid %s entry %x !?", info->name, idx);
+#endif
             return 0;
         }