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[2/6] target/ppc: fix exception error value in slbfee

Message ID 20220627141104.669152-3-matheus.ferst@eldorado.org.br
State Accepted
Headers show
Series Fix gen_*_exception error codes | expand

Commit Message

Matheus K. Ferst June 27, 2022, 2:11 p.m. UTC
Testing on a POWER9 DD2.3, we observed that the Linux kernel delivers a
signal with si_code ILL_PRVOPC (5) when a userspace application tries to
use slbfee. To obtain this behavior on linux-user, we should use
POWERPC_EXCP_PRIV with POWERPC_EXCP_PRIV_OPC.

No functional change is intended for softmmu targets as
gen_hvpriv_exception uses the same 'exception' argument
(POWERPC_EXCP_HV_EMU) for raise_exception_*, and the powerpc_excp_*
methods do not use lower bits of the exception error code when handling
POWERPC_EXCP_{INVAL,PRIV}.

Reported-by: Laurent Vivier <laurent@vivier.eu>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
---
 target/ppc/translate.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Daniel Henrique Barboza July 13, 2022, 8:05 p.m. UTC | #1
On 6/27/22 11:11, Matheus Ferst wrote:
> Testing on a POWER9 DD2.3, we observed that the Linux kernel delivers a
> signal with si_code ILL_PRVOPC (5) when a userspace application tries to
> use slbfee. To obtain this behavior on linux-user, we should use
> POWERPC_EXCP_PRIV with POWERPC_EXCP_PRIV_OPC.
> 
> No functional change is intended for softmmu targets as
> gen_hvpriv_exception uses the same 'exception' argument
> (POWERPC_EXCP_HV_EMU) for raise_exception_*, and the powerpc_excp_*
> methods do not use lower bits of the exception error code when handling
> POWERPC_EXCP_{INVAL,PRIV}.
> 
> Reported-by: Laurent Vivier <laurent@vivier.eu>
> Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
> ---

Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>

>   target/ppc/translate.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/target/ppc/translate.c b/target/ppc/translate.c
> index 55f34eb490..d7e5670c20 100644
> --- a/target/ppc/translate.c
> +++ b/target/ppc/translate.c
> @@ -5386,12 +5386,12 @@ static void gen_slbmfev(DisasContext *ctx)
>   static void gen_slbfee_(DisasContext *ctx)
>   {
>   #if defined(CONFIG_USER_ONLY)
> -    gen_inval_exception(ctx, POWERPC_EXCP_PRIV_REG);
> +    gen_hvpriv_exception(ctx, POWERPC_EXCP_PRIV_OPC);
>   #else
>       TCGLabel *l1, *l2;
>   
>       if (unlikely(ctx->pr)) {
> -        gen_inval_exception(ctx, POWERPC_EXCP_PRIV_REG);
> +        gen_hvpriv_exception(ctx, POWERPC_EXCP_PRIV_OPC);
>           return;
>       }
>       gen_helper_find_slb_vsid(cpu_gpr[rS(ctx->opcode)], cpu_env,
diff mbox series

Patch

diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index 55f34eb490..d7e5670c20 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -5386,12 +5386,12 @@  static void gen_slbmfev(DisasContext *ctx)
 static void gen_slbfee_(DisasContext *ctx)
 {
 #if defined(CONFIG_USER_ONLY)
-    gen_inval_exception(ctx, POWERPC_EXCP_PRIV_REG);
+    gen_hvpriv_exception(ctx, POWERPC_EXCP_PRIV_OPC);
 #else
     TCGLabel *l1, *l2;
 
     if (unlikely(ctx->pr)) {
-        gen_inval_exception(ctx, POWERPC_EXCP_PRIV_REG);
+        gen_hvpriv_exception(ctx, POWERPC_EXCP_PRIV_OPC);
         return;
     }
     gen_helper_find_slb_vsid(cpu_gpr[rS(ctx->opcode)], cpu_env,