@@ -14,6 +14,7 @@
#define MMCR1_PMC1_INS_CNT 0x02000000
#define MMCR1_PMC1_INS_CNT2 0xFE000000
+#define MMCR1_PMC2_INS_CNT 0x00020000
/*
* Increments PMC1 checking if MMCR1_PMC1SEL has one of the following
@@ -61,6 +62,36 @@ static void pmu_inc_pmc1(DisasContext *ctx)
tcg_temp_free(t2);
}
+/*
+ * Increments PMC2 checking if MMCR1_PMC2SEL = 0x02
+ * (PM_INST_CMPL event).
+ *
+ * This function assumes that MMCR0_FC14 is cleared.
+ */
+static void pmu_inc_pmc2(DisasContext *ctx)
+{
+ TCGv t0, t1;
+ TCGLabel *l_skip_pmc;
+
+ /* PMC2 will be incremented if MMCR1_PMC2SEL is 0x2 */
+ l_skip_pmc = gen_new_label();
+
+ t0 = tcg_temp_new();
+ gen_load_spr(t0, SPR_POWER_MMCR1);
+ tcg_gen_andi_tl(t0, t0, MMCR1_PMC2_INS_CNT);
+ tcg_gen_brcondi_tl(TCG_COND_NE, t0, MMCR1_PMC2_INS_CNT, l_skip_pmc);
+
+ t1 = tcg_temp_new();
+ gen_load_spr(t1, SPR_POWER_PMC2);
+ tcg_gen_addi_tl(t1, t1, ctx->base.num_insns);
+ gen_store_spr(SPR_POWER_PMC2, t1);
+
+ gen_set_label(l_skip_pmc);
+
+ tcg_temp_free(t0);
+ tcg_temp_free(t1);
+}
+
/*
* Increments PMC5 if MMCR0_FC is cleared.
*/
@@ -127,6 +158,7 @@ static void pmu_count_insns(DisasContext *ctx)
tcg_gen_brcondi_tl(TCG_COND_EQ, t_mmcr1, 0x0, l_skip_pmc14);
pmu_inc_pmc1(ctx);
+ pmu_inc_pmc2(ctx);
gen_set_label(l_skip_pmc14);
Add PMC2 PM_INST_CMPL count with TCG Ops. Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> --- target/ppc/power8-pmu-insn-cnt.c.inc | 32 ++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+)