| Message ID | 20211222063817.1541058-6-clg@kaod.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | ppc/pnv: Preliminary cleanups before user created PHBs | expand |
On 12/22/21 03:38, Cédric Le Goater wrote: > This cleanups the PHB4 model a bit more since the root port is an > independent device and it will ease our task when adding user created > PHB4s. > > Signed-off-by: Cédric Le Goater <clg@kaod.org> > --- Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> > include/hw/pci-host/pnv_phb4.h | 2 -- > hw/pci-host/pnv_phb4.c | 11 ----------- > hw/ppc/pnv.c | 9 ++++++++- > 3 files changed, 8 insertions(+), 14 deletions(-) > > diff --git a/include/hw/pci-host/pnv_phb4.h b/include/hw/pci-host/pnv_phb4.h > index 4a19338db35e..ea63df967678 100644 > --- a/include/hw/pci-host/pnv_phb4.h > +++ b/include/hw/pci-host/pnv_phb4.h > @@ -78,8 +78,6 @@ OBJECT_DECLARE_SIMPLE_TYPE(PnvPHB4, PNV_PHB4) > struct PnvPHB4 { > PCIExpressHost parent_obj; > > - PnvPHB4RootPort root; > - > uint32_t chip_id; > uint32_t phb_id; > > diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c > index 3b50a22b97cd..3b4758c42e26 100644 > --- a/hw/pci-host/pnv_phb4.c > +++ b/hw/pci-host/pnv_phb4.c > @@ -1158,12 +1158,6 @@ static void pnv_phb4_instance_init(Object *obj) > > /* XIVE interrupt source object */ > object_initialize_child(obj, "source", &phb->xsrc, TYPE_XIVE_SOURCE); > - > - /* Root Port */ > - object_initialize_child(obj, "root", &phb->root, TYPE_PNV_PHB4_ROOT_PORT); > - > - qdev_prop_set_int32(DEVICE(&phb->root), "addr", PCI_DEVFN(0, 0)); > - qdev_prop_set_bit(DEVICE(&phb->root), "multifunction", false); > } > > static void pnv_phb4_realize(DeviceState *dev, Error **errp) > @@ -1207,11 +1201,6 @@ static void pnv_phb4_realize(DeviceState *dev, Error **errp) > pci_setup_iommu(pci->bus, pnv_phb4_dma_iommu, phb); > pci->bus->flags |= PCI_BUS_EXTENDED_CONFIG_SPACE; > > - /* Add a single Root port */ > - qdev_prop_set_uint8(DEVICE(&phb->root), "chassis", phb->chip_id); > - qdev_prop_set_uint16(DEVICE(&phb->root), "slot", phb->phb_id); > - qdev_realize(DEVICE(&phb->root), BUS(pci->bus), &error_fatal); > - > /* Setup XIVE Source */ > if (phb->big_phb) { > nr_irqs = PNV_PHB4_MAX_INTs; > diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c > index 6edfd6876fd0..7a397698e984 100644 > --- a/hw/ppc/pnv.c > +++ b/hw/ppc/pnv.c > @@ -1403,7 +1403,7 @@ static void pnv_chip_quad_realize(Pnv9Chip *chip9, Error **errp) > static void pnv_chip_power9_pec_realize(PnvChip *chip, Error **errp) > { > Pnv9Chip *chip9 = PNV9_CHIP(chip); > - int i; > + int i, j; > > for (i = 0; i < chip->num_pecs; i++) { > PnvPhb4PecState *pec = &chip9->pecs[i]; > @@ -1425,6 +1425,13 @@ static void pnv_chip_power9_pec_realize(PnvChip *chip, Error **errp) > > pnv_xscom_add_subregion(chip, pec_nest_base, &pec->nest_regs_mr); > pnv_xscom_add_subregion(chip, pec_pci_base, &pec->pci_regs_mr); > + > + for (j = 0; j < pec->num_stacks; j++) { > + PnvPHB4 *phb = &pec->stacks[j].phb; > + > + pnv_phb_attach_root_port(PCI_HOST_BRIDGE(phb), phb->phb_id, > + TYPE_PNV_PHB4_ROOT_PORT); > + } > } > } > >
diff --git a/include/hw/pci-host/pnv_phb4.h b/include/hw/pci-host/pnv_phb4.h index 4a19338db35e..ea63df967678 100644 --- a/include/hw/pci-host/pnv_phb4.h +++ b/include/hw/pci-host/pnv_phb4.h @@ -78,8 +78,6 @@ OBJECT_DECLARE_SIMPLE_TYPE(PnvPHB4, PNV_PHB4) struct PnvPHB4 { PCIExpressHost parent_obj; - PnvPHB4RootPort root; - uint32_t chip_id; uint32_t phb_id; diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c index 3b50a22b97cd..3b4758c42e26 100644 --- a/hw/pci-host/pnv_phb4.c +++ b/hw/pci-host/pnv_phb4.c @@ -1158,12 +1158,6 @@ static void pnv_phb4_instance_init(Object *obj) /* XIVE interrupt source object */ object_initialize_child(obj, "source", &phb->xsrc, TYPE_XIVE_SOURCE); - - /* Root Port */ - object_initialize_child(obj, "root", &phb->root, TYPE_PNV_PHB4_ROOT_PORT); - - qdev_prop_set_int32(DEVICE(&phb->root), "addr", PCI_DEVFN(0, 0)); - qdev_prop_set_bit(DEVICE(&phb->root), "multifunction", false); } static void pnv_phb4_realize(DeviceState *dev, Error **errp) @@ -1207,11 +1201,6 @@ static void pnv_phb4_realize(DeviceState *dev, Error **errp) pci_setup_iommu(pci->bus, pnv_phb4_dma_iommu, phb); pci->bus->flags |= PCI_BUS_EXTENDED_CONFIG_SPACE; - /* Add a single Root port */ - qdev_prop_set_uint8(DEVICE(&phb->root), "chassis", phb->chip_id); - qdev_prop_set_uint16(DEVICE(&phb->root), "slot", phb->phb_id); - qdev_realize(DEVICE(&phb->root), BUS(pci->bus), &error_fatal); - /* Setup XIVE Source */ if (phb->big_phb) { nr_irqs = PNV_PHB4_MAX_INTs; diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 6edfd6876fd0..7a397698e984 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -1403,7 +1403,7 @@ static void pnv_chip_quad_realize(Pnv9Chip *chip9, Error **errp) static void pnv_chip_power9_pec_realize(PnvChip *chip, Error **errp) { Pnv9Chip *chip9 = PNV9_CHIP(chip); - int i; + int i, j; for (i = 0; i < chip->num_pecs; i++) { PnvPhb4PecState *pec = &chip9->pecs[i]; @@ -1425,6 +1425,13 @@ static void pnv_chip_power9_pec_realize(PnvChip *chip, Error **errp) pnv_xscom_add_subregion(chip, pec_nest_base, &pec->nest_regs_mr); pnv_xscom_add_subregion(chip, pec_pci_base, &pec->pci_regs_mr); + + for (j = 0; j < pec->num_stacks; j++) { + PnvPHB4 *phb = &pec->stacks[j].phb; + + pnv_phb_attach_root_port(PCI_HOST_BRIDGE(phb), phb->phb_id, + TYPE_PNV_PHB4_ROOT_PORT); + } } }
This cleanups the PHB4 model a bit more since the root port is an independent device and it will ease our task when adding user created PHB4s. Signed-off-by: Cédric Le Goater <clg@kaod.org> --- include/hw/pci-host/pnv_phb4.h | 2 -- hw/pci-host/pnv_phb4.c | 11 ----------- hw/ppc/pnv.c | 9 ++++++++- 3 files changed, 8 insertions(+), 14 deletions(-)