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Mon, 20 Dec 2021 18:19:30 GMT Received: from b03ledav006.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 657D1C6061; Mon, 20 Dec 2021 18:19:30 +0000 (GMT) Received: from b03ledav006.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id DA73BC6055; Mon, 20 Dec 2021 18:19:28 +0000 (GMT) Received: from farosas.linux.ibm.com.com (unknown [9.211.60.53]) by b03ledav006.gho.boulder.ibm.com (Postfix) with ESMTP; Mon, 20 Dec 2021 18:19:28 +0000 (GMT) From: Fabiano Rosas To: qemu-devel@nongnu.org Subject: [RFC v2 09/12] target/ppc: Use common code for Hypervisor interrupts Date: Mon, 20 Dec 2021 15:19:00 -0300 Message-Id: <20211220181903.3456898-10-farosas@linux.ibm.com> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20211220181903.3456898-1-farosas@linux.ibm.com> References: <20211220181903.3456898-1-farosas@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: twECGO6jLbsfinCjSHPo5oi-gbgEsFJ4 X-Proofpoint-ORIG-GUID: mAJhdgT7gNq-8bCC0CnNSGKNIpdZ4q7y X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2021-12-20_08,2021-12-20_01,2021-12-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 adultscore=0 priorityscore=1501 mlxscore=0 phishscore=0 spamscore=0 bulkscore=0 mlxlogscore=999 clxscore=1015 malwarescore=0 suspectscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2110150000 definitions=main-2112200101 Received-SPF: pass client-ip=148.163.158.5; envelope-from=farosas@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: danielhb413@gmail.com, qemu-ppc@nongnu.org, clg@kaod.org, david@gibson.dropbear.id.au Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-ppc" The Hypervisor interrupts all set the MSR_HV bit, and use HSRRs instead of SRRs, so we can use the same code to setup them all. No functional change. Signed-off-by: Fabiano Rosas --- target/ppc/interrupts.c | 128 +++++++--------------------------------- target/ppc/ppc_intr.h | 8 +-- 2 files changed, 21 insertions(+), 115 deletions(-) diff --git a/target/ppc/interrupts.c b/target/ppc/interrupts.c index 1e4fb2d6db..61a7dec682 100644 --- a/target/ppc/interrupts.c +++ b/target/ppc/interrupts.c @@ -364,86 +364,22 @@ void ppc_intr_system_reset(PowerPCCPU *cpu, PPCIntrArgs *regs, bool *ignore) } } +void ppc_intr_hv(PowerPCCPU *cpu, PPCIntrArgs *regs, bool *ignore) +{ + CPUPPCState *env = &cpu->env; + + regs->sprn_srr0 = SPR_HSRR0; + regs->sprn_srr1 = SPR_HSRR1; + regs->new_msr |= (target_ulong)MSR_HVB; + regs->new_msr |= env->msr & ((target_ulong)1 << MSR_RI); +} + void ppc_intr_hv_insn_storage(PowerPCCPU *cpu, PPCIntrArgs *regs, bool *ignore) { CPUPPCState *env = &cpu->env; regs->msr |= env->error_code; - - regs->sprn_srr0 = SPR_HSRR0; - regs->sprn_srr1 = SPR_HSRR1; - regs->new_msr |= (target_ulong)MSR_HVB; - regs->new_msr |= env->msr & ((target_ulong)1 << MSR_RI); -} - -void ppc_intr_hv_decrementer(PowerPCCPU *cpu, PPCIntrArgs *regs, bool *ignore) -{ - CPUPPCState *env = &cpu->env; - - regs->sprn_srr0 = SPR_HSRR0; - regs->sprn_srr1 = SPR_HSRR1; - regs->new_msr |= (target_ulong)MSR_HVB; - regs->new_msr |= env->msr & ((target_ulong)1 << MSR_RI); -} - -void ppc_intr_hv_data_storage(PowerPCCPU *cpu, PPCIntrArgs *regs, bool *ignore) -{ - CPUPPCState *env = &cpu->env; - - regs->sprn_srr0 = SPR_HSRR0; - regs->sprn_srr1 = SPR_HSRR1; - regs->new_msr |= (target_ulong)MSR_HVB; - regs->new_msr |= env->msr & ((target_ulong)1 << MSR_RI); -} - -void ppc_intr_hv_data_segment(PowerPCCPU *cpu, PPCIntrArgs *regs, bool *ignore) -{ - CPUPPCState *env = &cpu->env; - - regs->sprn_srr0 = SPR_HSRR0; - regs->sprn_srr1 = SPR_HSRR1; - regs->new_msr |= (target_ulong)MSR_HVB; - regs->new_msr |= env->msr & ((target_ulong)1 << MSR_RI); -} - -void ppc_intr_hv_insn_segment(PowerPCCPU *cpu, PPCIntrArgs *regs, bool *ignore) -{ - CPUPPCState *env = &cpu->env; - - regs->sprn_srr0 = SPR_HSRR0; - regs->sprn_srr1 = SPR_HSRR1; - regs->new_msr |= (target_ulong)MSR_HVB; - regs->new_msr |= env->msr & ((target_ulong)1 << MSR_RI); -} - -void ppc_intr_hv_doorbell(PowerPCCPU *cpu, PPCIntrArgs *regs, bool *ignore) -{ - CPUPPCState *env = &cpu->env; - - regs->sprn_srr0 = SPR_HSRR0; - regs->sprn_srr1 = SPR_HSRR1; - regs->new_msr |= (target_ulong)MSR_HVB; - regs->new_msr |= env->msr & ((target_ulong)1 << MSR_RI); -} - -void ppc_intr_hv_emulation(PowerPCCPU *cpu, PPCIntrArgs *regs, bool *ignore) -{ - CPUPPCState *env = &cpu->env; - - regs->sprn_srr0 = SPR_HSRR0; - regs->sprn_srr1 = SPR_HSRR1; - regs->new_msr |= (target_ulong)MSR_HVB; - regs->new_msr |= env->msr & ((target_ulong)1 << MSR_RI); -} - -void ppc_intr_hv_virtualization(PowerPCCPU *cpu, PPCIntrArgs *regs, bool *ignore) -{ - CPUPPCState *env = &cpu->env; - - regs->sprn_srr0 = SPR_HSRR0; - regs->sprn_srr1 = SPR_HSRR1; - regs->new_msr |= (target_ulong)MSR_HVB; - regs->new_msr |= env->msr & ((target_ulong)1 << MSR_RI); + ppc_intr_hv(cpu, regs, ignore); } void ppc_intr_facility_unavail(PowerPCCPU *cpu, PPCIntrArgs *regs, bool *ignore) @@ -459,11 +395,7 @@ void ppc_intr_hv_facility_unavail(PowerPCCPU *cpu, PPCIntrArgs *regs, bool *igno #ifdef TARGET_PPC64 CPUPPCState *env = &cpu->env; env->spr[SPR_FSCR] |= ((target_ulong)env->error_code << FSCR_IC_POS); - - regs->sprn_srr0 = SPR_HSRR0; - regs->sprn_srr1 = SPR_HSRR1; - regs->new_msr |= (target_ulong)MSR_HVB; - regs->new_msr |= env->msr & ((target_ulong)1 << MSR_RI); + ppc_intr_hv(cpu, regs, ignore); #endif } @@ -571,34 +503,10 @@ PPCInterrupt interrupts[POWERPC_EXCP_NB] = { "Facility unavailable", ppc_intr_facility_unavail }, - [POWERPC_EXCP_HDECR] = { - "Hypervisor decrementer", ppc_intr_hv_decrementer - }, - - [POWERPC_EXCP_HDSEG] = { - "Hypervisor data segment", ppc_intr_hv_data_segment - }, - - [POWERPC_EXCP_HDSI] = { - "Hypervisor data storage", ppc_intr_hv_data_storage - }, - - [POWERPC_EXCP_HISEG] = { - "Hypervisor insn segment", ppc_intr_hv_insn_segment - }, - [POWERPC_EXCP_HISI] = { "Hypervisor instruction storage", ppc_intr_hv_insn_storage }, - [POWERPC_EXCP_HVIRT] = { - "Hypervisor virtualization", ppc_intr_hv_virtualization - }, - - [POWERPC_EXCP_HV_EMU] = { - "Hypervisor emulation assist", ppc_intr_hv_emulation - }, - [POWERPC_EXCP_HV_FU] = { "Hypervisor facility unavailable" , ppc_intr_hv_facility_unavail }, @@ -627,10 +535,6 @@ PPCInterrupt interrupts[POWERPC_EXCP_NB] = { "System reset", ppc_intr_system_reset }, - [POWERPC_EXCP_SDOOR_HV] = { - "Hypervisor doorbell", ppc_intr_hv_doorbell - }, - [POWERPC_EXCP_SPEU] = { "SPE/embedded FP unavailable/VPU", ppc_intr_spe_unavailable }, @@ -655,6 +559,14 @@ PPCInterrupt interrupts[POWERPC_EXCP_NB] = { "Watchdog timer", ppc_intr_watchdog }, + [POWERPC_EXCP_HDECR] = { "Hypervisor decrementer", ppc_intr_hv }, + [POWERPC_EXCP_HDSEG] = { "Hypervisor data segment", ppc_intr_hv }, + [POWERPC_EXCP_HDSI] = { "Hypervisor data storage", ppc_intr_hv }, + [POWERPC_EXCP_HISEG] = { "Hypervisor insn segment", ppc_intr_hv }, + [POWERPC_EXCP_HVIRT] = { "Hypervisor virtualization", ppc_intr_hv }, + [POWERPC_EXCP_HV_EMU] = { "Hypervisor emulation assist", ppc_intr_hv }, + [POWERPC_EXCP_SDOOR_HV] = { "Hypervisor doorbell", ppc_intr_hv }, + [POWERPC_EXCP_APU] = { "Aux. processor unavailable", ppc_intr_noop }, [POWERPC_EXCP_DECR] = { "Decrementer", ppc_intr_noop }, [POWERPC_EXCP_DOORI] = { "Embedded doorbell", ppc_intr_noop }, diff --git a/target/ppc/ppc_intr.h b/target/ppc/ppc_intr.h index a96062c583..078906ed68 100644 --- a/target/ppc/ppc_intr.h +++ b/target/ppc/ppc_intr.h @@ -27,15 +27,9 @@ void ppc_intr_embedded_doorbell_crit(PowerPCCPU *cpu, PPCIntrArgs *regs, bool *i void ppc_intr_external(PowerPCCPU *cpu, PPCIntrArgs *regs, bool *ignore); void ppc_intr_facility_unavail(PowerPCCPU *cpu, PPCIntrArgs *regs, bool *ignore); void ppc_intr_fit(PowerPCCPU *cpu, PPCIntrArgs *regs, bool *ignore); -void ppc_intr_hv_data_segment(PowerPCCPU *cpu, PPCIntrArgs *regs, bool *ignore); -void ppc_intr_hv_data_storage(PowerPCCPU *cpu, PPCIntrArgs *regs, bool *ignore); -void ppc_intr_hv_decrementer(PowerPCCPU *cpu, PPCIntrArgs *regs, bool *ignore); -void ppc_intr_hv_doorbell(PowerPCCPU *cpu, PPCIntrArgs *regs, bool *ignore); -void ppc_intr_hv_emulation(PowerPCCPU *cpu, PPCIntrArgs *regs, bool *ignore); +void ppc_intr_hv(PowerPCCPU *cpu, PPCIntrArgs *regs, bool *ignore); void ppc_intr_hv_facility_unavail(PowerPCCPU *cpu, PPCIntrArgs *regs, bool *ignore); -void ppc_intr_hv_insn_segment(PowerPCCPU *cpu, PPCIntrArgs *regs, bool *ignore); void ppc_intr_hv_insn_storage(PowerPCCPU *cpu, PPCIntrArgs *regs, bool *ignore); -void ppc_intr_hv_virtualization(PowerPCCPU *cpu, PPCIntrArgs *regs, bool *ignore); void ppc_intr_insn_storage(PowerPCCPU *cpu, PPCIntrArgs *regs, bool *ignore); void ppc_intr_machine_check(PowerPCCPU *cpu, PPCIntrArgs *regs, bool *ignore); void ppc_intr_noop(PowerPCCPU *cpu, PPCIntrArgs *regs, bool *ignore);