diff mbox series

[v3,18/18] pnv/xive2: Add support for 8bits thread id

Message ID 20211126115349.2737605-19-clg@kaod.org
State Superseded
Headers show
Series ppc/pnv: Extend the powernv10 machine | expand

Commit Message

Cédric Le Goater Nov. 26, 2021, 11:53 a.m. UTC
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
 include/hw/ppc/xive2.h | 1 +
 hw/intc/pnv_xive2.c    | 5 +++++
 hw/intc/xive2.c        | 3 ++-
 3 files changed, 8 insertions(+), 1 deletion(-)

Comments

Daniel Henrique Barboza Feb. 25, 2022, 4:33 p.m. UTC | #1
On 11/26/21 08:53, Cédric Le Goater wrote:
> Signed-off-by: Cédric Le Goater <clg@kaod.org>
> ---

Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>

>   include/hw/ppc/xive2.h | 1 +
>   hw/intc/pnv_xive2.c    | 5 +++++
>   hw/intc/xive2.c        | 3 ++-
>   3 files changed, 8 insertions(+), 1 deletion(-)
> 
> diff --git a/include/hw/ppc/xive2.h b/include/hw/ppc/xive2.h
> index 88c3e393162d..001388ccea7a 100644
> --- a/include/hw/ppc/xive2.h
> +++ b/include/hw/ppc/xive2.h
> @@ -31,6 +31,7 @@ OBJECT_DECLARE_TYPE(Xive2Router, Xive2RouterClass, XIVE2_ROUTER);
>   
>   #define XIVE2_GEN1_TIMA_OS      0x00000001
>   #define XIVE2_VP_SAVE_RESTORE   0x00000002
> +#define XIVE2_THREADID_8BITS    0x00000004
>   
>   typedef struct Xive2RouterClass {
>       SysBusDeviceClass parent;
> diff --git a/hw/intc/pnv_xive2.c b/hw/intc/pnv_xive2.c
> index 6f0a63cd3d2f..5aaccaf78934 100644
> --- a/hw/intc/pnv_xive2.c
> +++ b/hw/intc/pnv_xive2.c
> @@ -438,6 +438,11 @@ static uint32_t pnv_xive2_get_config(Xive2Router *xrtr)
>           cfg |= XIVE2_VP_SAVE_RESTORE;
>       }
>   
> +    if (GETFIELD(CQ_XIVE_CFG_HYP_HARD_RANGE,
> +              xive->cq_regs[CQ_XIVE_CFG >> 3]) == CQ_XIVE_CFG_THREADID_8BITS) {
> +        cfg |= XIVE2_THREADID_8BITS;
> +    }
> +
>       return cfg;
>   }
>   
> diff --git a/hw/intc/xive2.c b/hw/intc/xive2.c
> index 978a0e3972e1..6b46f7021b46 100644
> --- a/hw/intc/xive2.c
> +++ b/hw/intc/xive2.c
> @@ -458,7 +458,8 @@ static uint32_t xive2_tctx_hw_cam_line(XivePresenter *xptr, XiveTCTX *tctx)
>       CPUPPCState *env = &POWERPC_CPU(tctx->cs)->env;
>       uint32_t pir = env->spr_cb[SPR_PIR].default_value;
>       uint8_t blk = xive2_router_get_block_id(xrtr);
> -    uint8_t tid_shift = 7;
> +    uint8_t tid_shift =
> +        xive2_router_get_config(xrtr) & XIVE2_THREADID_8BITS ? 8 : 7;
>       uint8_t tid_mask = (1 << tid_shift) - 1;
>   
>       return xive2_nvp_cam_line(blk, 1 << tid_shift | (pir & tid_mask));
diff mbox series

Patch

diff --git a/include/hw/ppc/xive2.h b/include/hw/ppc/xive2.h
index 88c3e393162d..001388ccea7a 100644
--- a/include/hw/ppc/xive2.h
+++ b/include/hw/ppc/xive2.h
@@ -31,6 +31,7 @@  OBJECT_DECLARE_TYPE(Xive2Router, Xive2RouterClass, XIVE2_ROUTER);
 
 #define XIVE2_GEN1_TIMA_OS      0x00000001
 #define XIVE2_VP_SAVE_RESTORE   0x00000002
+#define XIVE2_THREADID_8BITS    0x00000004
 
 typedef struct Xive2RouterClass {
     SysBusDeviceClass parent;
diff --git a/hw/intc/pnv_xive2.c b/hw/intc/pnv_xive2.c
index 6f0a63cd3d2f..5aaccaf78934 100644
--- a/hw/intc/pnv_xive2.c
+++ b/hw/intc/pnv_xive2.c
@@ -438,6 +438,11 @@  static uint32_t pnv_xive2_get_config(Xive2Router *xrtr)
         cfg |= XIVE2_VP_SAVE_RESTORE;
     }
 
+    if (GETFIELD(CQ_XIVE_CFG_HYP_HARD_RANGE,
+              xive->cq_regs[CQ_XIVE_CFG >> 3]) == CQ_XIVE_CFG_THREADID_8BITS) {
+        cfg |= XIVE2_THREADID_8BITS;
+    }
+
     return cfg;
 }
 
diff --git a/hw/intc/xive2.c b/hw/intc/xive2.c
index 978a0e3972e1..6b46f7021b46 100644
--- a/hw/intc/xive2.c
+++ b/hw/intc/xive2.c
@@ -458,7 +458,8 @@  static uint32_t xive2_tctx_hw_cam_line(XivePresenter *xptr, XiveTCTX *tctx)
     CPUPPCState *env = &POWERPC_CPU(tctx->cs)->env;
     uint32_t pir = env->spr_cb[SPR_PIR].default_value;
     uint8_t blk = xive2_router_get_block_id(xrtr);
-    uint8_t tid_shift = 7;
+    uint8_t tid_shift =
+        xive2_router_get_config(xrtr) & XIVE2_THREADID_8BITS ? 8 : 7;
     uint8_t tid_mask = (1 << tid_shift) - 1;
 
     return xive2_nvp_cam_line(blk, 1 << tid_shift | (pir & tid_mask));