mbox series

[00/37] target/ppc: PowerISA Vector/VSX instruction batch

Message ID 20220107185653.1609775-1-matheus.ferst@eldorado.org.br
Headers show
Series target/ppc: PowerISA Vector/VSX instruction batch | expand

Message

Matheus K. Ferst Jan. 7, 2022, 6:56 p.m. UTC
From: Matheus Ferst <matheus.ferst@eldorado.org.br>

This patch series implements 5 missing instructions from PowerISA v3.0
and 40 new instructions from PowerISA v3.1, moving 62 other instructions
to decodetree along the way.

Lucas Coutinho (2):
  target/ppc: Move vexts[bhw]2[wd] to decodetree
  target/ppc: Implement vextsd2q

Lucas Mateus Castro (alqotel) (3):
  target/ppc: moved vector even and odd multiplication to decodetree
  target/ppc: Moved vector multiply high and low to decodetree
  target/ppc: vmulh* instructions use gvec

Luis Pires (1):
  target/ppc: Introduce TRANS*FLAGS macros

Matheus Ferst (20):
  target/ppc: Move Vector Compare Equal/Not Equal/Greater Than to
    decodetree
  target/ppc: Move Vector Compare Not Equal or Zero to decodetree
  target/ppc: Implement Vector Compare Equal Quadword
  target/ppc: Implement Vector Compare Greater Than Quadword
  target/ppc: Implement Vector Compare Quadword
  target/ppc: implement vstri[bh][lr]
  target/ppc: implement vclrlb
  target/ppc: implement vclrrb
  target/ppc: implement vcntmb[bhwd]
  target/ppc: implement vgnb
  target/ppc: Move vsel and vperm/vpermr to decodetree
  target/ppc: Move xxsel to decodetree
  target/ppc: move xxperm/xxpermr to decodetree
  target/ppc: Move xxpermdi to decodetree
  target/ppc: Implement xxpermx instruction
  tcg/tcg-op-gvec.c: Introduce tcg_gen_gvec_4i
  target/ppc: Implement xxeval
  target/ppc: Implement xxgenpcv[bhwd]m instruction
  target/ppc: move xs[n]madd[am][ds]p/xs[n]msub[am][ds]p to decodetree
  target/ppc: implement xs[n]maddqp[o]/xs[n]msubqp[o]

Victor Colombo (6):
  target/ppc: Implement xvtlsbb instruction
  target/ppc: Refactor VSX_SCALAR_CMP_DP
  target/ppc: Implement xscmp{eq,ge,gt}qp
  target/ppc: Move xscmp{eq,ge,gt,ne}dp to decodetree
  target/ppc: Refactor VSX_MAX_MINC helper
  target/ppc: Implement xs{max,min}cqp

Víctor Colombo (5):
  target/ppc: Implement vmsumcud instruction
  target/ppc: Implement vmsumudm instruction
  target/ppc: Implement do_helper_XX3 and move xxperm* to use it
  target/ppc: Move xs{max,min}[cj]dp to use do_helper_XX3
  target/ppc: Implement xvcvbf16spn and xvcvspbf16 instructions

 include/tcg/tcg-op-gvec.h           |  22 +
 target/ppc/fpu_helper.c             | 172 ++++--
 target/ppc/helper.h                 | 144 ++---
 target/ppc/insn32.decode            | 189 +++++-
 target/ppc/insn64.decode            |  40 +-
 target/ppc/int_helper.c             | 354 ++++++-----
 target/ppc/translate.c              |  19 +
 target/ppc/translate/vmx-impl.c.inc | 894 +++++++++++++++++++++++++---
 target/ppc/translate/vmx-ops.c.inc  |  41 +-
 target/ppc/translate/vsx-impl.c.inc | 516 ++++++++++++----
 target/ppc/translate/vsx-ops.c.inc  |  67 ---
 tcg/ppc/tcg-target.c.inc            |   6 +
 tcg/tcg-op-gvec.c                   | 146 +++++
 13 files changed, 2037 insertions(+), 573 deletions(-)

Comments

Daniel Henrique Barboza Jan. 10, 2022, 2:51 p.m. UTC | #1
On 1/7/22 15:56, matheus.ferst@eldorado.org.br wrote:
> From: Matheus Ferst <matheus.ferst@eldorado.org.br>
> 
> This patch series implements 5 missing instructions from PowerISA v3.0
> and 40 new instructions from PowerISA v3.1, moving 62 other instructions
> to decodetree along the way.
> 
> Lucas Coutinho (2):
>    target/ppc: Move vexts[bhw]2[wd] to decodetree
>    target/ppc: Implement vextsd2q
> 
> Lucas Mateus Castro (alqotel) (3):
>    target/ppc: moved vector even and odd multiplication to decodetree
>    target/ppc: Moved vector multiply high and low to decodetree
>    target/ppc: vmulh* instructions use gvec
> 
> Luis Pires (1):
>    target/ppc: Introduce TRANS*FLAGS macros
> 
> Matheus Ferst (20):
>    target/ppc: Move Vector Compare Equal/Not Equal/Greater Than to
>      decodetree
>    target/ppc: Move Vector Compare Not Equal or Zero to decodetree
>    target/ppc: Implement Vector Compare Equal Quadword
>    target/ppc: Implement Vector Compare Greater Than Quadword
>    target/ppc: Implement Vector Compare Quadword
>    target/ppc: implement vstri[bh][lr]
>    target/ppc: implement vclrlb
>    target/ppc: implement vclrrb
>    target/ppc: implement vcntmb[bhwd]
>    target/ppc: implement vgnb
>    target/ppc: Move vsel and vperm/vpermr to decodetree
>    target/ppc: Move xxsel to decodetree
>    target/ppc: move xxperm/xxpermr to decodetree
>    target/ppc: Move xxpermdi to decodetree
>    target/ppc: Implement xxpermx instruction
>    tcg/tcg-op-gvec.c: Introduce tcg_gen_gvec_4i
>    target/ppc: Implement xxeval
>    target/ppc: Implement xxgenpcv[bhwd]m instruction
>    target/ppc: move xs[n]madd[am][ds]p/xs[n]msub[am][ds]p to decodetree
>    target/ppc: implement xs[n]maddqp[o]/xs[n]msubqp[o]
> 
> Victor Colombo (6):
>    target/ppc: Implement xvtlsbb instruction
>    target/ppc: Refactor VSX_SCALAR_CMP_DP
>    target/ppc: Implement xscmp{eq,ge,gt}qp
>    target/ppc: Move xscmp{eq,ge,gt,ne}dp to decodetree
>    target/ppc: Refactor VSX_MAX_MINC helper
>    target/ppc: Implement xs{max,min}cqp
> 
> Víctor Colombo (5):
>    target/ppc: Implement vmsumcud instruction
>    target/ppc: Implement vmsumudm instruction
>    target/ppc: Implement do_helper_XX3 and move xxperm* to use it
>    target/ppc: Move xs{max,min}[cj]dp to use do_helper_XX3
>    target/ppc: Implement xvcvbf16spn and xvcvspbf16 instructions

I believe Victor would want to standardize whether he would like his name
using acute or not (Víctor vs Victor). Both are fine, but sticking with
a single one will make git happier because, as we can see here, git thinks
that Víctor and Victor are 2 different people.

For reference, Victor has 2 patches upstream without using acute.



Thanks,


Daniel



> 
>   include/tcg/tcg-op-gvec.h           |  22 +
>   target/ppc/fpu_helper.c             | 172 ++++--
>   target/ppc/helper.h                 | 144 ++---
>   target/ppc/insn32.decode            | 189 +++++-
>   target/ppc/insn64.decode            |  40 +-
>   target/ppc/int_helper.c             | 354 ++++++-----
>   target/ppc/translate.c              |  19 +
>   target/ppc/translate/vmx-impl.c.inc | 894 +++++++++++++++++++++++++---
>   target/ppc/translate/vmx-ops.c.inc  |  41 +-
>   target/ppc/translate/vsx-impl.c.inc | 516 ++++++++++++----
>   target/ppc/translate/vsx-ops.c.inc  |  67 ---
>   tcg/ppc/tcg-target.c.inc            |   6 +
>   tcg/tcg-op-gvec.c                   | 146 +++++
>   13 files changed, 2037 insertions(+), 573 deletions(-)
>
Cédric Le Goater Jan. 24, 2022, 5:01 p.m. UTC | #2
On 1/7/22 19:56, matheus.ferst@eldorado.org.br wrote:
> From: Matheus Ferst <matheus.ferst@eldorado.org.br>
> 
> This patch series implements 5 missing instructions from PowerISA v3.0
> and 40 new instructions from PowerISA v3.1, moving 62 other instructions
> to decodetree along the way.

I haven't seen any regressions with this series and it should be included
in the next ppc PR.

Thanks,

C.

> 
> Lucas Coutinho (2):
>    target/ppc: Move vexts[bhw]2[wd] to decodetree
>    target/ppc: Implement vextsd2q
> 
> Lucas Mateus Castro (alqotel) (3):
>    target/ppc: moved vector even and odd multiplication to decodetree
>    target/ppc: Moved vector multiply high and low to decodetree
>    target/ppc: vmulh* instructions use gvec
> 
> Luis Pires (1):
>    target/ppc: Introduce TRANS*FLAGS macros
> 
> Matheus Ferst (20):
>    target/ppc: Move Vector Compare Equal/Not Equal/Greater Than to
>      decodetree
>    target/ppc: Move Vector Compare Not Equal or Zero to decodetree
>    target/ppc: Implement Vector Compare Equal Quadword
>    target/ppc: Implement Vector Compare Greater Than Quadword
>    target/ppc: Implement Vector Compare Quadword
>    target/ppc: implement vstri[bh][lr]
>    target/ppc: implement vclrlb
>    target/ppc: implement vclrrb
>    target/ppc: implement vcntmb[bhwd]
>    target/ppc: implement vgnb
>    target/ppc: Move vsel and vperm/vpermr to decodetree
>    target/ppc: Move xxsel to decodetree
>    target/ppc: move xxperm/xxpermr to decodetree
>    target/ppc: Move xxpermdi to decodetree
>    target/ppc: Implement xxpermx instruction
>    tcg/tcg-op-gvec.c: Introduce tcg_gen_gvec_4i
>    target/ppc: Implement xxeval
>    target/ppc: Implement xxgenpcv[bhwd]m instruction
>    target/ppc: move xs[n]madd[am][ds]p/xs[n]msub[am][ds]p to decodetree
>    target/ppc: implement xs[n]maddqp[o]/xs[n]msubqp[o]
> 
> Victor Colombo (6):
>    target/ppc: Implement xvtlsbb instruction
>    target/ppc: Refactor VSX_SCALAR_CMP_DP
>    target/ppc: Implement xscmp{eq,ge,gt}qp
>    target/ppc: Move xscmp{eq,ge,gt,ne}dp to decodetree
>    target/ppc: Refactor VSX_MAX_MINC helper
>    target/ppc: Implement xs{max,min}cqp
> 
> Víctor Colombo (5):
>    target/ppc: Implement vmsumcud instruction
>    target/ppc: Implement vmsumudm instruction
>    target/ppc: Implement do_helper_XX3 and move xxperm* to use it
>    target/ppc: Move xs{max,min}[cj]dp to use do_helper_XX3
>    target/ppc: Implement xvcvbf16spn and xvcvspbf16 instructions
> 
>   include/tcg/tcg-op-gvec.h           |  22 +
>   target/ppc/fpu_helper.c             | 172 ++++--
>   target/ppc/helper.h                 | 144 ++---
>   target/ppc/insn32.decode            | 189 +++++-
>   target/ppc/insn64.decode            |  40 +-
>   target/ppc/int_helper.c             | 354 ++++++-----
>   target/ppc/translate.c              |  19 +
>   target/ppc/translate/vmx-impl.c.inc | 894 +++++++++++++++++++++++++---
>   target/ppc/translate/vmx-ops.c.inc  |  41 +-
>   target/ppc/translate/vsx-impl.c.inc | 516 ++++++++++++----
>   target/ppc/translate/vsx-ops.c.inc  |  67 ---
>   tcg/ppc/tcg-target.c.inc            |   6 +
>   tcg/tcg-op-gvec.c                   | 146 +++++
>   13 files changed, 2037 insertions(+), 573 deletions(-)
>