From patchwork Thu Nov 6 20:38:10 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Maciej W. Rozycki" X-Patchwork-Id: 407722 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 32E4A14003E for ; Fri, 7 Nov 2014 07:38:57 +1100 (AEDT) Received: from localhost ([::1]:55958 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XmTpV-0007Ca-9N for incoming@patchwork.ozlabs.org; Thu, 06 Nov 2014 15:38:53 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48917) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XmTp6-0006tx-S6 for qemu-devel@nongnu.org; Thu, 06 Nov 2014 15:38:34 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XmToy-0002JU-1b for qemu-devel@nongnu.org; Thu, 06 Nov 2014 15:38:28 -0500 Received: from relay1.mentorg.com ([192.94.38.131]:54646) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XmTox-0002Hj-Rb for qemu-devel@nongnu.org; Thu, 06 Nov 2014 15:38:19 -0500 Received: from nat-ies.mentorg.com ([192.94.31.2] helo=SVR-IES-FEM-01.mgc.mentorg.com) by relay1.mentorg.com with esmtp id 1XmTou-0005la-5X from Maciej_Rozycki@mentor.com ; Thu, 06 Nov 2014 12:38:16 -0800 Received: from localhost (137.202.0.76) by SVR-IES-FEM-01.mgc.mentorg.com (137.202.0.104) with Microsoft SMTP Server (TLS) id 14.3.181.6; Thu, 6 Nov 2014 20:38:14 +0000 Date: Thu, 6 Nov 2014 20:38:10 +0000 From: "Maciej W. Rozycki" To: In-Reply-To: Message-ID: References: User-Agent: Alpine 1.10 (DEB 962 2008-03-14) MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Windows NT kernel [generic] [fuzzy] X-Received-From: 192.94.38.131 Cc: Leon Alrae , Aurelien Jarno Subject: [Qemu-devel] [PATCH RESEND] mips: Ensure PC update with MTC0 single-stepping X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Correct the way PC is updated when single-stepping instructions, by keeping the old PC only for the BS_EXCP (exception condition) state. Some MTC0 (and possibly other) instructions switch to the BS_STOP state to terminate the current translation block, so that the state transition of the simulated CPU resulting from the CP0 operation takes effect with the following instruction. This happens with `mtc0 ,c0_config' for example, typically used to set KSEG0 cacheability. While single-stepping this has a side-effect of not advancing the PC past the instruction just executed; subsequent single-step traps will stop at the same instruction repeatedly. Example: (gdb) stepi 0x80004d24 in _start () 5: x/i $pc => 0x80004d24 <_start+364>: mfc0 t1,c0_config (gdb) 0x80004d28 in _start () 5: x/i $pc => 0x80004d28 <_start+368>: li at,-8 (gdb) 0x80004d2c in _start () 5: x/i $pc => 0x80004d2c <_start+372>: and t1,t1,at (gdb) 0x80004d30 in _start () 5: x/i $pc => 0x80004d30 <_start+376>: ori t1,t1,0x3 (gdb) 0x80004d34 in _start () 5: x/i $pc => 0x80004d34 <_start+380>: mtc0 t1,c0_config (gdb) 0x80004d34 in _start () 5: x/i $pc => 0x80004d34 <_start+380>: mtc0 t1,c0_config (gdb) 0x80004d34 in _start () 5: x/i $pc => 0x80004d34 <_start+380>: mtc0 t1,c0_config (gdb) 0x80004d34 in _start () 5: x/i $pc => 0x80004d34 <_start+380>: mtc0 t1,c0_config (gdb) -- oops! Signed-off-by: Maciej W. Rozycki Reviewed-by: Leon Alrae --- It's been lost and waited for too long now, the original submission has been archived here: http://lists.gnu.org/archive/html/qemu-devel/2012-06/msg01227.html I have verified with a manual check that the issue is still there and that the fix still works. Please apply. Maciej qemu-mips-mtc0-step.diff Index: qemu-git-trunk/target-mips/translate.c =================================================================== --- qemu-git-trunk.orig/target-mips/translate.c 2014-11-02 18:51:10.838947420 +0000 +++ qemu-git-trunk/target-mips/translate.c 2014-11-02 18:51:14.838939198 +0000 @@ -17522,7 +17522,7 @@ gen_intermediate_code_internal(MIPSCPU * gen_io_end(); } if (cs->singlestep_enabled && ctx.bstate != BS_BRANCH) { - save_cpu_state(&ctx, ctx.bstate == BS_NONE); + save_cpu_state(&ctx, ctx.bstate != BS_EXCP); gen_helper_0e0i(raise_exception, EXCP_DEBUG); } else { switch (ctx.bstate) {