From patchwork Thu Jul 22 22:01:50 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Blue Swirl X-Patchwork-Id: 59676 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id C07B710229B for ; Fri, 23 Jul 2010 08:30:58 +1000 (EST) Received: from localhost ([127.0.0.1]:49217 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Oc4I3-0007gQ-QQ for incoming@patchwork.ozlabs.org; Thu, 22 Jul 2010 18:30:55 -0400 Received: from [140.186.70.92] (port=42713 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Oc3wf-00031d-Mv for qemu-devel@nongnu.org; Thu, 22 Jul 2010 18:08:51 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1Oc3qH-0003LY-T4 for qemu-devel@nongnu.org; Thu, 22 Jul 2010 18:02:14 -0400 Received: from mail-qw0-f45.google.com ([209.85.216.45]:60998) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1Oc3qH-0003Ic-Pg for qemu-devel@nongnu.org; Thu, 22 Jul 2010 18:02:13 -0400 Received: by mail-qw0-f45.google.com with SMTP id 6so3334892qwf.4 for ; Thu, 22 Jul 2010 15:02:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:mime-version:received:from:date :message-id:subject:to:content-type; bh=913yB6pEhHKHNrNaCS9APlVcWKP7PBJg2izZ3mCuKAg=; b=QfX0sCBN2mKLVYTLU/dtq0QSpKsZOUnL5P4H8ghuyIcOLl2PSaRBJzV8rpYw0HTkbe ZLrbME/QJ9CWeWcBdkN4elRhF0Z25Rt1xnqTk7Vajfz5Z6J14K26Zbqoeax292FJjGLv YJUC103Vj6rXGRHd7pTgrdnRgN/WaiWxX+9LU= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:from:date:message-id:subject:to:content-type; b=lgjwG2+dV6I5Dtv4pJ3LichkfpmPtBBsGZtbDjlbymJnPS6tkZfNJUKNKHP8MfQqpP uCM0EQbARGWOj7QcxFudp60GmoVwkq0Y4nIHjVe3a2t0lV72F+0dPUtsQ8XozFAfP4/8 1ZBXIhW0namkoXFQCWG2nraM7clpN26bpnfwU= Received: by 10.224.12.9 with SMTP id v9mr1693651qav.265.1279836133362; Thu, 22 Jul 2010 15:02:13 -0700 (PDT) MIME-Version: 1.0 Received: by 10.229.185.146 with HTTP; Thu, 22 Jul 2010 15:01:50 -0700 (PDT) From: Blue Swirl Date: Thu, 22 Jul 2010 22:01:50 +0000 Message-ID: To: qemu-devel X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) Subject: [Qemu-devel] [PATCH 27/34] pci: replace pci_bus_set_mem_base() with bus specific manipulation X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Move PCI memory base adjustment to APB specific MMIO manipulator. Signed-off-by: Blue Swirl --- hw/apb_pci.c | 25 ++++++++++++++++++++++++- hw/pci.c | 26 +++++--------------------- hw/pci.h | 2 -- 3 files changed, 29 insertions(+), 24 deletions(-) typedef void (*pci_unregister_mem_fn)(void *opaque, pcibus_t addr, diff --git a/hw/apb_pci.c b/hw/apb_pci.c index 0ecac55..71c5e75 100644 --- a/hw/apb_pci.c +++ b/hw/apb_pci.c @@ -75,6 +75,7 @@ typedef struct APBState { qemu_irq pci_irqs[32]; uint32_t reset_control; unsigned int nr_resets; + target_phys_addr_t mem_base; } APBState; static void apb_config_writel (void *opaque, target_phys_addr_t addr, @@ -314,6 +315,26 @@ static void apb_pci_bridge_init(PCIBus *b) pci_set_byte(dev->config + PCI_REVISION_ID, 0x11); } +static void apb_register_mem(void *opaque, pcibus_t addr, pcibus_t size, + int mm) +{ + APBState *d = opaque; + + APB_DPRINTF("%s: addr %" FMT_PCIBUS " size %" FMT_PCIBUS " mm %x\n", + __func__, addr, size, mm); + cpu_register_physical_memory(addr + d->mem_base, size, mm); +} + +static void apb_unregister_mem(void *opaque, pcibus_t addr, pcibus_t size) +{ + APBState *d = opaque; + + APB_DPRINTF("%s: addr %" FMT_PCIBUS " size %" FMT_PCIBUS "\n", + __func__, addr, size); + cpu_register_physical_memory(addr + d->mem_base, size, IO_MEM_UNASSIGNED); +} + + PCIBus *pci_apb_init(target_phys_addr_t special_base, target_phys_addr_t mem_base, qemu_irq *pic, PCIBus **bus2, PCIBus **bus3) @@ -334,11 +355,13 @@ PCIBus *pci_apb_init(target_phys_addr_t special_base, /* pci_ioport */ sysbus_mmio_map(s, 2, special_base + 0x2000000ULL); d = FROM_SYSBUS(APBState, s); + d->mem_base = mem_base; d->bus = pci_register_bus(&d->busdev.qdev, "pci", pci_apb_set_irq, pci_pbm_map_irq, d, 0, 32); - pci_bus_set_mem_base(d->bus, mem_base); + pci_bus_set_register_mem_fn(d->bus, apb_register_mem, + apb_unregister_mem, d); for (i = 0; i < 32; i++) { sysbus_connect_irq(s, i, pic[i]); diff --git a/hw/pci.c b/hw/pci.c index 3555ef3..d617c9f 100644 --- a/hw/pci.c +++ b/hw/pci.c @@ -46,7 +46,6 @@ struct PCIBus { void *irq_opaque; PCIDevice *devices[256]; PCIDevice *parent_dev; - target_phys_addr_t mem_base; pci_register_mem_fn register_mem; pci_unregister_mem_fn unregister_mem; void *register_mem_opaque; @@ -293,11 +292,6 @@ void pci_bus_hotplug(PCIBus *bus, pci_hotplug_fn hotplug, DeviceState *qdev) bus->hotplug_qdev = qdev; } -void pci_bus_set_mem_base(PCIBus *bus, target_phys_addr_t base) -{ - bus->mem_base = base; -} - PCIBus *pci_register_bus(DeviceState *parent, const char *name, pci_set_irq_fn set_irq, pci_map_irq_fn map_irq, void *irq_opaque, int devfn_min, int nirq) @@ -752,12 +746,6 @@ PCIDevice *pci_register_device(PCIBus *bus, const char *name, return pci_dev; } -static target_phys_addr_t pci_to_cpu_addr(PCIBus *bus, - target_phys_addr_t addr) -{ - return addr + bus->mem_base; -} - static void pci_unregister_io_regions(PCIDevice *pci_dev) { PCIIORegion *r; @@ -779,8 +767,7 @@ static void pci_unregister_io_regions(PCIDevice *pci_dev) isa_unassign_ioport(r->addr + s->offset, s->filtered_size); } else { pci_dev->bus->unregister_mem(pci_dev->bus->register_mem_opaque, - pci_to_cpu_addr(pci_dev->bus, - r->addr + s->offset), + r->addr + s->offset, s->filtered_size); } } @@ -1092,9 +1079,7 @@ static void pci_update_mappings(PCIDevice *d) } } else { d->bus->unregister_mem(d->bus->register_mem_opaque, - pci_to_cpu_addr(d->bus, - r->addr + - s->offset), + r->addr + s->offset, s->filtered_size); qemu_unregister_coalesced_mmio(r->addr + s->offset, s->filtered_size); @@ -1118,11 +1103,10 @@ static void pci_update_mappings(PCIDevice *d) } } else { d->bus->register_mem(d->bus->register_mem_opaque, - pci_to_cpu_addr(d->bus, new_addr), - s->filtered_size, s->ix); + new_addr, s->filtered_size, + s->ix); if (r->post_map_func) { - r->post_map_func(d, i, - pci_to_cpu_addr(d->bus, new_addr), + r->post_map_func(d, i, new_addr, s->filtered_size, r->type); } } diff --git a/hw/pci.h b/hw/pci.h index 8c2b84c..71d75b6 100644 --- a/hw/pci.h +++ b/hw/pci.h @@ -226,8 +226,6 @@ PCIBus *pci_register_bus(DeviceState *parent, const char *name, pci_set_irq_fn set_irq, pci_map_irq_fn map_irq, void *irq_opaque, int devfn_min, int nirq); -void pci_bus_set_mem_base(PCIBus *bus, target_phys_addr_t base); - typedef void (*pci_register_mem_fn)(void *opaque, pcibus_t addr, pcibus_t size, int mm);