From patchwork Thu Jul 22 21:59:55 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Blue Swirl X-Patchwork-Id: 59666 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 0841A1007D8 for ; Fri, 23 Jul 2010 08:20:20 +1000 (EST) Received: from localhost ([127.0.0.1]:38859 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Oc47R-0000O4-TY for incoming@patchwork.ozlabs.org; Thu, 22 Jul 2010 18:19:58 -0400 Received: from [140.186.70.92] (port=42713 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Oc3x0-00031d-1c for qemu-devel@nongnu.org; Thu, 22 Jul 2010 18:09:11 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1Oc3oP-00034U-Gy for qemu-devel@nongnu.org; Thu, 22 Jul 2010 18:00:18 -0400 Received: from mail-gw0-f45.google.com ([74.125.83.45]:56223) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1Oc3oP-00034Q-C1 for qemu-devel@nongnu.org; Thu, 22 Jul 2010 18:00:17 -0400 Received: by gwb11 with SMTP id 11so420437gwb.4 for ; Thu, 22 Jul 2010 15:00:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:mime-version:received:from:date :message-id:subject:to:content-type; bh=pQLZk1gu0TrfmaNJFMweXlaoF/17nkOa/x7tNNOnHPw=; b=jBCP5wL2fVlBZuYrrQy5e7JBrJSlvmuOGB9G+KXHHWszMoZid0mbRP80gmmW3Cg8o8 kiqKat/zMvatUAD8NLGa65GRdostpo7Kwe3g4LgCXFIq0O4yT9U1kmLBlq9VGHoPp0J0 xxVRePm1snqSB0B6VZsHGfez2kPbSmfMfacTI= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:from:date:message-id:subject:to:content-type; b=AcHPRzXPyKNAIyV5csEBxj4bsswdzqOT61mmD+8cmPx5PgSnLksTYanPd8MT7cEF7b eLq4qSaiIi3FTebpD1NiBvkd1kdg+GBO4gOQPMlgR/o9SEXDrjfqFJwEBUiy8QBALGI8 qnAmkYgdmqtcaU9WQ1N3D6Swo3C92PurnpXL8= Received: by 10.224.122.234 with SMTP id m42mr1752735qar.235.1279836016231; Thu, 22 Jul 2010 15:00:16 -0700 (PDT) MIME-Version: 1.0 Received: by 10.229.185.146 with HTTP; Thu, 22 Jul 2010 14:59:55 -0700 (PDT) From: Blue Swirl Date: Thu, 22 Jul 2010 21:59:55 +0000 Message-ID: To: qemu-devel X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) Subject: [Qemu-devel] [PATCH 20/34] eepro100: convert to pci_bar_map X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Use pci_bar_map() and post_map_func instead of a mapping function. Signed-off-by: Blue Swirl --- hw/eepro100.c | 72 +++++++++++++++++++++++++++----------------------------- 1 files changed, 35 insertions(+), 37 deletions(-) static void ioport_write1(void *opaque, uint32_t addr, uint32_t val) @@ -1500,19 +1500,19 @@ static void ioport_write1(void *opaque, uint32_t addr, uint32_t val) #if 0 logout("addr=%s val=0x%02x\n", regname(addr), val); #endif - eepro100_write1(s, addr - s->region[1], val); + eepro100_write1(s, addr - s->region, val); } static void ioport_write2(void *opaque, uint32_t addr, uint32_t val) { EEPRO100State *s = opaque; - eepro100_write2(s, addr - s->region[1], val); + eepro100_write2(s, addr - s->region, val); } static void ioport_write4(void *opaque, uint32_t addr, uint32_t val) { EEPRO100State *s = opaque; - eepro100_write4(s, addr - s->region[1], val); + eepro100_write4(s, addr - s->region, val); } /***********************************************************/ @@ -1528,16 +1528,22 @@ static void pci_map(PCIDevice * pci_dev, int region_num, region_num, addr, size, type)); assert(region_num == 1); - register_ioport_write(addr, size, 1, ioport_write1, s); - register_ioport_read(addr, size, 1, ioport_read1, s); - register_ioport_write(addr, size, 2, ioport_write2, s); - register_ioport_read(addr, size, 2, ioport_read2, s); - register_ioport_write(addr, size, 4, ioport_write4, s); - register_ioport_read(addr, size, 4, ioport_read4, s); - s->region[region_num] = addr; + s->region = addr; } +static IOPortWriteFunc * const io_writes[] = { + ioport_write1, + ioport_write2, + ioport_write4, +}; + +static IOPortReadFunc * const io_reads[] = { + ioport_read1, + ioport_read2, + ioport_read4, +}; + /***************************************************************************** * * Memory mapped I/O. @@ -1610,22 +1616,6 @@ static CPUReadMemoryFunc * const pci_mmio_read[] = { pci_mmio_readl }; -static void pci_mmio_map(PCIDevice * pci_dev, int region_num, - pcibus_t addr, pcibus_t size, int type) -{ - EEPRO100State *s = DO_UPCAST(EEPRO100State, dev, pci_dev); - - TRACE(OTHER, logout("region %d, addr=0x%08"FMT_PCIBUS", " - "size=0x%08"FMT_PCIBUS", type=%d\n", - region_num, addr, size, type)); - - assert(region_num == 0 || region_num == 2); - - /* Map control / status registers and flash. */ - cpu_register_physical_memory(addr, size, s->mmio_index); - s->region[region_num] = addr; -} - static int nic_can_receive(VLANClientState *nc) { EEPRO100State *s = DO_UPCAST(NICState, nc, nc)->opaque; @@ -1853,6 +1843,7 @@ static int e100_nic_init(PCIDevice *pci_dev) EEPRO100State *s = DO_UPCAST(EEPRO100State, dev, pci_dev); E100PCIDeviceInfo *e100_device = DO_UPCAST(E100PCIDeviceInfo, pci.qdev, pci_dev->qdev.info); + int io_index; TRACE(OTHER, logout("\n")); @@ -1868,17 +1859,24 @@ static int e100_nic_init(PCIDevice *pci_dev) s->mmio_index = cpu_register_io_memory(pci_mmio_read, pci_mmio_write, s); + /* Map control / status registers. */ pci_register_bar(&s->dev, 0, PCI_MEM_SIZE, PCI_BASE_ADDRESS_SPACE_MEMORY | - PCI_BASE_ADDRESS_MEM_PREFETCH, pci_mmio_map, NULL); - pci_register_bar(&s->dev, 1, PCI_IO_SIZE, PCI_BASE_ADDRESS_SPACE_IO, - pci_map, NULL); - pci_register_bar(&s->dev, 2, PCI_FLASH_SIZE, PCI_BASE_ADDRESS_SPACE_MEMORY, - pci_mmio_map, NULL); + PCI_BASE_ADDRESS_MEM_PREFETCH, NULL, NULL); + pci_bar_map(&s->dev, 0, 0, 0, PCI_IO_SIZE, s->mmio_index); + + io_index = cpu_register_io(io_reads, io_writes, PCI_IO_SIZE, s); + pci_register_bar(&s->dev, 1, PCI_IO_SIZE, PCI_BASE_ADDRESS_SPACE_IO, NULL, + pci_map); + pci_bar_map(&s->dev, 1, 0, 0, PCI_IO_SIZE, io_index); + + /* Map flash. */ + pci_register_bar(&s->dev, 2, PCI_FLASH_SIZE, + PCI_BASE_ADDRESS_SPACE_MEMORY, NULL, NULL); + pci_bar_map(&s->dev, 2, 0, 0, PCI_FLASH_SIZE, s->mmio_index); qemu_macaddr_default_if_unset(&s->conf.macaddr); logout("macaddr: %s\n", nic_dump(&s->conf.macaddr.a[0], 6)); - assert(s->region[1] == 0); nic_reset(s); diff --git a/hw/eepro100.c b/hw/eepro100.c index 2b86007..747cb4c 100644 --- a/hw/eepro100.c +++ b/hw/eepro100.c @@ -226,7 +226,7 @@ typedef struct { uint8_t scb_stat; /* SCB stat/ack byte */ uint8_t int_stat; /* PCI interrupt status */ /* region must not be saved by nic_save. */ - uint32_t region[3]; /* PCI region addresses */ + uint32_t region; /* PCI I/O port region address */ uint16_t mdimem[32]; eeprom_t *eeprom; uint32_t device; /* device variant */ @@ -1479,19 +1479,19 @@ static uint32_t ioport_read1(void *opaque, uint32_t addr) #if 0 logout("addr=%s\n", regname(addr)); #endif - return eepro100_read1(s, addr - s->region[1]); + return eepro100_read1(s, addr - s->region); } static uint32_t ioport_read2(void *opaque, uint32_t addr) { EEPRO100State *s = opaque; - return eepro100_read2(s, addr - s->region[1]); + return eepro100_read2(s, addr - s->region); } static uint32_t ioport_read4(void *opaque, uint32_t addr) { EEPRO100State *s = opaque; - return eepro100_read4(s, addr - s->region[1]); + return eepro100_read4(s, addr - s->region); }