@@ -226,7 +226,7 @@ typedef struct {
uint8_t scb_stat; /* SCB stat/ack byte */
uint8_t int_stat; /* PCI interrupt status */
/* region must not be saved by nic_save. */
- uint32_t region[3]; /* PCI region addresses */
+ uint32_t region; /* PCI I/O port region address */
uint16_t mdimem[32];
eeprom_t *eeprom;
uint32_t device; /* device variant */
@@ -1479,19 +1479,19 @@ static uint32_t ioport_read1(void *opaque,
uint32_t addr)
#if 0
logout("addr=%s\n", regname(addr));
#endif
- return eepro100_read1(s, addr - s->region[1]);
+ return eepro100_read1(s, addr - s->region);
}
static uint32_t ioport_read2(void *opaque, uint32_t addr)
{
EEPRO100State *s = opaque;
- return eepro100_read2(s, addr - s->region[1]);
+ return eepro100_read2(s, addr - s->region);
}
static uint32_t ioport_read4(void *opaque, uint32_t addr)
{
EEPRO100State *s = opaque;
- return eepro100_read4(s, addr - s->region[1]);
+ return eepro100_read4(s, addr - s->region);
}
Use pci_bar_map() and post_map_func instead of a mapping function. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> --- hw/eepro100.c | 72 +++++++++++++++++++++++++++----------------------------- 1 files changed, 35 insertions(+), 37 deletions(-) static void ioport_write1(void *opaque, uint32_t addr, uint32_t val) @@ -1500,19 +1500,19 @@ static void ioport_write1(void *opaque, uint32_t addr, uint32_t val) #if 0 logout("addr=%s val=0x%02x\n", regname(addr), val); #endif - eepro100_write1(s, addr - s->region[1], val); + eepro100_write1(s, addr - s->region, val); } static void ioport_write2(void *opaque, uint32_t addr, uint32_t val) { EEPRO100State *s = opaque; - eepro100_write2(s, addr - s->region[1], val); + eepro100_write2(s, addr - s->region, val); } static void ioport_write4(void *opaque, uint32_t addr, uint32_t val) { EEPRO100State *s = opaque; - eepro100_write4(s, addr - s->region[1], val); + eepro100_write4(s, addr - s->region, val); } /***********************************************************/ @@ -1528,16 +1528,22 @@ static void pci_map(PCIDevice * pci_dev, int region_num, region_num, addr, size, type)); assert(region_num == 1); - register_ioport_write(addr, size, 1, ioport_write1, s); - register_ioport_read(addr, size, 1, ioport_read1, s); - register_ioport_write(addr, size, 2, ioport_write2, s); - register_ioport_read(addr, size, 2, ioport_read2, s); - register_ioport_write(addr, size, 4, ioport_write4, s); - register_ioport_read(addr, size, 4, ioport_read4, s); - s->region[region_num] = addr; + s->region = addr; } +static IOPortWriteFunc * const io_writes[] = { + ioport_write1, + ioport_write2, + ioport_write4, +}; + +static IOPortReadFunc * const io_reads[] = { + ioport_read1, + ioport_read2, + ioport_read4, +}; + /***************************************************************************** * * Memory mapped I/O. @@ -1610,22 +1616,6 @@ static CPUReadMemoryFunc * const pci_mmio_read[] = { pci_mmio_readl }; -static void pci_mmio_map(PCIDevice * pci_dev, int region_num, - pcibus_t addr, pcibus_t size, int type) -{ - EEPRO100State *s = DO_UPCAST(EEPRO100State, dev, pci_dev); - - TRACE(OTHER, logout("region %d, addr=0x%08"FMT_PCIBUS", " - "size=0x%08"FMT_PCIBUS", type=%d\n", - region_num, addr, size, type)); - - assert(region_num == 0 || region_num == 2); - - /* Map control / status registers and flash. */ - cpu_register_physical_memory(addr, size, s->mmio_index); - s->region[region_num] = addr; -} - static int nic_can_receive(VLANClientState *nc) { EEPRO100State *s = DO_UPCAST(NICState, nc, nc)->opaque; @@ -1853,6 +1843,7 @@ static int e100_nic_init(PCIDevice *pci_dev) EEPRO100State *s = DO_UPCAST(EEPRO100State, dev, pci_dev); E100PCIDeviceInfo *e100_device = DO_UPCAST(E100PCIDeviceInfo, pci.qdev, pci_dev->qdev.info); + int io_index; TRACE(OTHER, logout("\n")); @@ -1868,17 +1859,24 @@ static int e100_nic_init(PCIDevice *pci_dev) s->mmio_index = cpu_register_io_memory(pci_mmio_read, pci_mmio_write, s); + /* Map control / status registers. */ pci_register_bar(&s->dev, 0, PCI_MEM_SIZE, PCI_BASE_ADDRESS_SPACE_MEMORY | - PCI_BASE_ADDRESS_MEM_PREFETCH, pci_mmio_map, NULL); - pci_register_bar(&s->dev, 1, PCI_IO_SIZE, PCI_BASE_ADDRESS_SPACE_IO, - pci_map, NULL); - pci_register_bar(&s->dev, 2, PCI_FLASH_SIZE, PCI_BASE_ADDRESS_SPACE_MEMORY, - pci_mmio_map, NULL); + PCI_BASE_ADDRESS_MEM_PREFETCH, NULL, NULL); + pci_bar_map(&s->dev, 0, 0, 0, PCI_IO_SIZE, s->mmio_index); + + io_index = cpu_register_io(io_reads, io_writes, PCI_IO_SIZE, s); + pci_register_bar(&s->dev, 1, PCI_IO_SIZE, PCI_BASE_ADDRESS_SPACE_IO, NULL, + pci_map); + pci_bar_map(&s->dev, 1, 0, 0, PCI_IO_SIZE, io_index); + + /* Map flash. */ + pci_register_bar(&s->dev, 2, PCI_FLASH_SIZE, + PCI_BASE_ADDRESS_SPACE_MEMORY, NULL, NULL); + pci_bar_map(&s->dev, 2, 0, 0, PCI_FLASH_SIZE, s->mmio_index); qemu_macaddr_default_if_unset(&s->conf.macaddr); logout("macaddr: %s\n", nic_dump(&s->conf.macaddr.a[0], 6)); - assert(s->region[1] == 0); nic_reset(s);