From patchwork Tue Apr 3 15:49:04 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Artyom Tarasenko X-Patchwork-Id: 150471 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 410EFB6F9A for ; Wed, 4 Apr 2012 01:49:32 +1000 (EST) Received: from localhost ([::1]:45034 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SF5z8-0001CJ-Hq for incoming@patchwork.ozlabs.org; Tue, 03 Apr 2012 11:49:30 -0400 Received: from eggs.gnu.org ([208.118.235.92]:53383) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SF5yx-0001BS-B1 for qemu-devel@nongnu.org; Tue, 03 Apr 2012 11:49:25 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SF5yu-00061Q-B5 for qemu-devel@nongnu.org; Tue, 03 Apr 2012 11:49:18 -0400 Received: from mail-bk0-f45.google.com ([209.85.214.45]:61348) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SF5yu-00060o-1m for qemu-devel@nongnu.org; Tue, 03 Apr 2012 11:49:16 -0400 Received: by bkcjg9 with SMTP id jg9so4151714bkc.4 for ; Tue, 03 Apr 2012 08:49:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer; bh=Hruk+sZVXMPZ3V0UrRNVdPsqOUM2KBtvhtpECrcV2Q8=; b=JIVnoVWhsrA7T/tN71Uhfgpm+PpqV7BX2PeOOoTLJ/7C8BZ8zQlvf6L7GvXubkveKf U5NZHBfKaEt2HJ21OwwBa/LJoq7Mk/HKcFQXIY/hnK5lmKQuHICCkBXCLFdfmI4rSpng OmflKREi+VJDG+W8g4HWlfPxI0Wk1H/2R9J2IcHDGeTSItnKmyfWEx45cb91w8xs3H4Q 0WQK267VJ+pedJTMTY9WvuTYBH1he453AtjtXL+XBMKtJ6hdJ8viqiDKqYQtlgg/4fom NsetrEg/BWFGU59KyCVYj5gE1Dr3BjFuIuC8qYJqnVM59odRoTWvGqb8Xemn63pV4yxa wEcQ== Received: by 10.204.145.81 with SMTP id c17mr5920076bkv.39.1333468153078; Tue, 03 Apr 2012 08:49:13 -0700 (PDT) Received: from localhost (e180216233.adsl.alicedsl.de. [85.180.216.233]) by mx.google.com with ESMTPS id r14sm46864783bkv.11.2012.04.03.08.49.10 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 03 Apr 2012 08:49:11 -0700 (PDT) From: Artyom Tarasenko To: qemu-devel@nongnu.org Date: Tue, 3 Apr 2012 17:49:04 +0200 Message-Id: <9752d94b9333062d8e3b74dffafc20f348167d95.1333467746.git.atar4qemu@gmail.com> X-Mailer: git-send-email 1.7.3.4 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.85.214.45 Cc: blauwirbel@gmail.com, Artyom Tarasenko Subject: [Qemu-devel] [PATCH 1/2][sparc64] Fix vector interrupt handling X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Don't produce stray irq 5, don't overwrite ivec_data if still busy with processing of the previous interrupt. Signed-off-by: Artyom Tarasenko --- hw/sun4u.c | 29 ++++++++++++++++------------- 1 files changed, 16 insertions(+), 13 deletions(-) diff --git a/hw/sun4u.c b/hw/sun4u.c index 1d67691..9d28194 100644 --- a/hw/sun4u.c +++ b/hw/sun4u.c @@ -315,19 +315,22 @@ static void cpu_set_ivec_irq(void *opaque, int irq, int level) CPUSPARCState *env = opaque; if (level) { - CPUIRQ_DPRINTF("Raise IVEC IRQ %d\n", irq); - env->interrupt_index = TT_IVEC; - env->pil_in |= 1 << 5; - env->ivec_status |= 0x20; - env->ivec_data[0] = (0x1f << 6) | irq; - env->ivec_data[1] = 0; - env->ivec_data[2] = 0; - cpu_interrupt(env, CPU_INTERRUPT_HARD); - } else { - CPUIRQ_DPRINTF("Lower IVEC IRQ %d\n", irq); - env->pil_in &= ~(1 << 5); - env->ivec_status &= ~0x20; - cpu_reset_interrupt(env, CPU_INTERRUPT_HARD); + if (!(env->ivec_status & 0x20)) { + CPUIRQ_DPRINTF("Raise IVEC IRQ %d\n", irq); + env->halted = 0; + env->interrupt_index = TT_IVEC; + env->ivec_status |= 0x20; + env->ivec_data[0] = (0x1f << 6) | irq; + env->ivec_data[1] = 0; + env->ivec_data[2] = 0; + cpu_interrupt(env, CPU_INTERRUPT_HARD); + } + } else { + if (env->ivec_status & 0x20) { + CPUIRQ_DPRINTF("Lower IVEC IRQ %d\n", irq); + env->ivec_status &= ~0x20; + cpu_reset_interrupt(env, CPU_INTERRUPT_HARD); + } } }