From patchwork Fri May 15 12:41:35 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jan Beulich X-Patchwork-Id: 472755 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4451A14010F for ; Fri, 15 May 2015 22:41:57 +1000 (AEST) Received: from localhost ([::1]:59453 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YtEw7-0000Qp-GW for incoming@patchwork.ozlabs.org; Fri, 15 May 2015 08:41:55 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45405) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YtEvs-00007a-0u for qemu-devel@nongnu.org; Fri, 15 May 2015 08:41:41 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YtEvo-0005U8-Rt for qemu-devel@nongnu.org; Fri, 15 May 2015 08:41:39 -0400 Received: from mail.emea.novell.com ([130.57.118.101]:58536) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YtEvo-0005Ty-Ia for qemu-devel@nongnu.org; Fri, 15 May 2015 08:41:36 -0400 Received: from EMEA1-MTA by mail.emea.novell.com with Novell_GroupWise; Fri, 15 May 2015 13:41:34 +0100 Message-Id: <5556059F020000780007A8D0@mail.emea.novell.com> X-Mailer: Novell GroupWise Internet Agent 14.0.1 Date: Fri, 15 May 2015 13:41:35 +0100 From: "Jan Beulich" To: Mime-Version: 1.0 Content-Disposition: inline X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 130.57.118.101 Cc: xen-devel , Stefano Stabellini Subject: [Qemu-devel] [PATCH] xen/pass-through: ROM BAR handling adjustments X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Expecting the ROM BAR to be written with an all ones value when sizing the region is wrong - the low bit has another meaning (enable/disable) and bits 1..10 are reserved. The PCI spec also mandates writing all ones to just the address portion of the register. Use suitable constants also for initializing the ROM BAR register field description. Signed-off-by: Jan Beulich --- a/hw/xen/xen_pt.c +++ b/hw/xen/xen_pt.c @@ -248,7 +248,9 @@ static void xen_pt_pci_write_config(PCID /* check unused BAR register */ index = xen_pt_bar_offset_to_index(addr); - if ((index >= 0) && (val > 0 && val < XEN_PT_BAR_ALLF) && + if ((index >= 0) && (val != 0) && + (((index != PCI_ROM_SLOT) ? + val : (val | (uint32_t)~PCI_ROM_ADDRESS_MASK)) != XEN_PT_BAR_ALLF) && (s->bases[index].bar_flag == XEN_PT_BAR_FLAG_UNUSED)) { XEN_PT_WARN(d, "Guest attempt to set address to unused Base Address " "Register. (addr: 0x%02x, len: %d)\n", addr, len); --- a/hw/xen/xen_pt_config_init.c +++ b/hw/xen/xen_pt_config_init.c @@ -726,8 +726,8 @@ static XenPTRegInfo xen_pt_emu_reg_heade .offset = PCI_ROM_ADDRESS, .size = 4, .init_val = 0x00000000, - .ro_mask = 0x000007FE, - .emu_mask = 0xFFFFF800, + .ro_mask = ~PCI_ROM_ADDRESS_MASK & ~PCI_ROM_ADDRESS_ENABLE, + .emu_mask = (uint32_t)PCI_ROM_ADDRESS_MASK, .init = xen_pt_bar_reg_init, .u.dw.read = xen_pt_long_reg_read, .u.dw.write = xen_pt_exp_rom_bar_reg_write,