diff mbox series

target/riscv/kvm: Fix leak of reg list

Message ID 20241104173551.125069-2-ajones@ventanamicro.com
State New
Headers show
Series target/riscv/kvm: Fix leak of reg list | expand

Commit Message

Andrew Jones Nov. 4, 2024, 5:35 p.m. UTC
Free the temporary register list.

Fixes: 608bdebb6075 ("target/riscv/kvm: support KVM_GET_REG_LIST")
Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
---
 target/riscv/kvm/kvm-cpu.c | 2 ++
 1 file changed, 2 insertions(+)

Comments

Daniel Henrique Barboza Nov. 4, 2024, 5:43 p.m. UTC | #1
On 11/4/24 2:35 PM, Andrew Jones wrote:
> Free the temporary register list.
> 
> Fixes: 608bdebb6075 ("target/riscv/kvm: support KVM_GET_REG_LIST")
> Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
> ---

Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>

>   target/riscv/kvm/kvm-cpu.c | 2 ++
>   1 file changed, 2 insertions(+)
> 
> diff --git a/target/riscv/kvm/kvm-cpu.c b/target/riscv/kvm/kvm-cpu.c
> index cbda4596da73..effd8fed815d 100644
> --- a/target/riscv/kvm/kvm-cpu.c
> +++ b/target/riscv/kvm/kvm-cpu.c
> @@ -1170,6 +1170,8 @@ static void kvm_riscv_init_multiext_cfg(RISCVCPU *cpu, KVMScratchCPU *kvmcpu)
>       }
>   
>       kvm_riscv_check_sbi_dbcn_support(cpu, kvmcpu, reglist);
> +
> +    g_free(reglist);
>   }
>   
>   static void riscv_init_kvm_registers(Object *cpu_obj)
Alistair Francis Nov. 4, 2024, 10:59 p.m. UTC | #2
On Tue, Nov 5, 2024 at 3:36 AM Andrew Jones <ajones@ventanamicro.com> wrote:
>
> Free the temporary register list.
>
> Fixes: 608bdebb6075 ("target/riscv/kvm: support KVM_GET_REG_LIST")
> Signed-off-by: Andrew Jones <ajones@ventanamicro.com>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  target/riscv/kvm/kvm-cpu.c | 2 ++
>  1 file changed, 2 insertions(+)
>
> diff --git a/target/riscv/kvm/kvm-cpu.c b/target/riscv/kvm/kvm-cpu.c
> index cbda4596da73..effd8fed815d 100644
> --- a/target/riscv/kvm/kvm-cpu.c
> +++ b/target/riscv/kvm/kvm-cpu.c
> @@ -1170,6 +1170,8 @@ static void kvm_riscv_init_multiext_cfg(RISCVCPU *cpu, KVMScratchCPU *kvmcpu)
>      }
>
>      kvm_riscv_check_sbi_dbcn_support(cpu, kvmcpu, reglist);
> +
> +    g_free(reglist);
>  }
>
>  static void riscv_init_kvm_registers(Object *cpu_obj)
> --
> 2.47.0
>
>
Alistair Francis Nov. 4, 2024, 11:03 p.m. UTC | #3
On Tue, Nov 5, 2024 at 3:36 AM Andrew Jones <ajones@ventanamicro.com> wrote:
>
> Free the temporary register list.
>
> Fixes: 608bdebb6075 ("target/riscv/kvm: support KVM_GET_REG_LIST")
> Signed-off-by: Andrew Jones <ajones@ventanamicro.com>

Thanks!

Applied to riscv-to-apply.next

Alistair

> ---
>  target/riscv/kvm/kvm-cpu.c | 2 ++
>  1 file changed, 2 insertions(+)
>
> diff --git a/target/riscv/kvm/kvm-cpu.c b/target/riscv/kvm/kvm-cpu.c
> index cbda4596da73..effd8fed815d 100644
> --- a/target/riscv/kvm/kvm-cpu.c
> +++ b/target/riscv/kvm/kvm-cpu.c
> @@ -1170,6 +1170,8 @@ static void kvm_riscv_init_multiext_cfg(RISCVCPU *cpu, KVMScratchCPU *kvmcpu)
>      }
>
>      kvm_riscv_check_sbi_dbcn_support(cpu, kvmcpu, reglist);
> +
> +    g_free(reglist);
>  }
>
>  static void riscv_init_kvm_registers(Object *cpu_obj)
> --
> 2.47.0
>
>
diff mbox series

Patch

diff --git a/target/riscv/kvm/kvm-cpu.c b/target/riscv/kvm/kvm-cpu.c
index cbda4596da73..effd8fed815d 100644
--- a/target/riscv/kvm/kvm-cpu.c
+++ b/target/riscv/kvm/kvm-cpu.c
@@ -1170,6 +1170,8 @@  static void kvm_riscv_init_multiext_cfg(RISCVCPU *cpu, KVMScratchCPU *kvmcpu)
     }
 
     kvm_riscv_check_sbi_dbcn_support(cpu, kvmcpu, reglist);
+
+    g_free(reglist);
 }
 
 static void riscv_init_kvm_registers(Object *cpu_obj)