diff mbox series

[01/10] target/riscv: Add `ext_ssdbltrp` in RISCVCPUConfig.

Message ID 20240912084832.2906991-2-cleger@rivosinc.com
State New
Headers show
Series [01/10] target/riscv: Add `ext_ssdbltrp` in RISCVCPUConfig. | expand

Commit Message

Clément Léger Sept. 12, 2024, 8:48 a.m. UTC 
This variable is used to determine if the Ssdbltrp extension is enabled.

Signed-off-by: Clément Léger <cleger@rivosinc.com>
---
 target/riscv/cpu_cfg.h | 1 +
 1 file changed, 1 insertion(+)

Comments

Daniel Henrique Barboza Sept. 21, 2024, 12:19 p.m. UTC | #1 
On 9/12/24 5:48 AM, Clément Léger wrote:
> This variable is used to determine if the Ssdbltrp extension is enabled.
> 
> Signed-off-by: Clément Léger <cleger@rivosinc.com>
> ---

I would merge this to patch 2 since the bool is being used there. Thanks,


Daniel

>   target/riscv/cpu_cfg.h | 1 +
>   1 file changed, 1 insertion(+)
> 
> diff --git a/target/riscv/cpu_cfg.h b/target/riscv/cpu_cfg.h
> index ae2a945b5f..dd804f95d4 100644
> --- a/target/riscv/cpu_cfg.h
> +++ b/target/riscv/cpu_cfg.h
> @@ -77,6 +77,7 @@ struct RISCVCPUConfig {
>       bool ext_smstateen;
>       bool ext_sstc;
>       bool ext_smcntrpmf;
> +    bool ext_ssdbltrp;
>       bool ext_svadu;
>       bool ext_svinval;
>       bool ext_svnapot;
diff mbox series

Patch

diff --git a/target/riscv/cpu_cfg.h b/target/riscv/cpu_cfg.h
index ae2a945b5f..dd804f95d4 100644
--- a/target/riscv/cpu_cfg.h
+++ b/target/riscv/cpu_cfg.h
@@ -77,6 +77,7 @@  struct RISCVCPUConfig {
     bool ext_smstateen;
     bool ext_sstc;
     bool ext_smcntrpmf;
+    bool ext_ssdbltrp;
     bool ext_svadu;
     bool ext_svinval;
     bool ext_svnapot;