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Thu, 25 Jul 2024 16:59:04 -0700 (PDT) Received: from wheely.local0.net ([203.220.44.216]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2cf28c7fef3sm2142060a91.16.2024.07.25.16.59.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 25 Jul 2024 16:59:04 -0700 (PDT) From: Nicholas Piggin To: qemu-devel@nongnu.org Cc: Nicholas Piggin , qemu-ppc@nongnu.org, BALATON Zoltan Subject: [PULL 80/96] target/ppc/mmu_common.c: Inline and remove ppc6xx_tlb_pte_check() Date: Fri, 26 Jul 2024 09:53:53 +1000 Message-ID: <20240725235410.451624-81-npiggin@gmail.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240725235410.451624-1-npiggin@gmail.com> References: <20240725235410.451624-1-npiggin@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::436; envelope-from=npiggin@gmail.com; helo=mail-pf1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: BALATON Zoltan This function is only called once and we can make the caller simpler by inlining it. Signed-off-by: BALATON Zoltan Reviewed-by: Nicholas Piggin Signed-off-by: Nicholas Piggin --- target/ppc/mmu_common.c | 71 +++++++++++++---------------------------- 1 file changed, 22 insertions(+), 49 deletions(-) diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c index b2993e8563..784e833ff2 100644 --- a/target/ppc/mmu_common.c +++ b/target/ppc/mmu_common.c @@ -91,33 +91,6 @@ int ppc6xx_tlb_getnum(CPUPPCState *env, target_ulong eaddr, return nr; } -static int ppc6xx_tlb_pte_check(mmu_ctx_t *ctx, target_ulong pte0, - target_ulong pte1, int pteh, - MMUAccessType access_type, bool nx) -{ - /* Check validity and table match */ - if (!pte_is_valid(pte0) || ((pte0 >> 6) & 1) != pteh || - (pte0 & PTE_PTEM_MASK) != ctx->ptem) { - return -1; - } - /* all matches should have equal RPN, WIMG & PP */ - if (ctx->raddr != (hwaddr)-1ULL && - (ctx->raddr & PTE_CHECK_MASK) != (pte1 & PTE_CHECK_MASK)) { - qemu_log_mask(CPU_LOG_MMU, "Bad RPN/WIMG/PP\n"); - return -3; - } - /* Keep the matching PTE information */ - ctx->raddr = pte1; - ctx->prot = ppc_hash32_prot(ctx->key, pte1 & HPTE32_R_PP, nx); - if (check_prot_access_type(ctx->prot, access_type)) { - qemu_log_mask(CPU_LOG_MMU, "PTE access granted !\n"); - return 0; - } else { - qemu_log_mask(CPU_LOG_MMU, "PTE access rejected\n"); - return -2; - } -} - /* Software driven TLB helpers */ static int ppc6xx_tlb_check(CPUPPCState *env, @@ -149,32 +122,32 @@ static int ppc6xx_tlb_check(CPUPPCState *env, tlb->EPN, eaddr, tlb->pte1, access_type == MMU_DATA_STORE ? 'S' : 'L', access_type == MMU_INST_FETCH ? 'I' : 'D'); - switch (ppc6xx_tlb_pte_check(ctx, tlb->pte0, tlb->pte1, - 0, access_type, nx)) { - case -2: - /* Access violation */ - ret = -2; - best = nr; - break; - case -1: /* No match */ - case -3: /* TLB inconsistency */ - default: - break; - case 0: - /* access granted */ - /* - * XXX: we should go on looping to check all TLBs - * consistency but we can speed-up the whole thing as - * the result would be undefined if TLBs are not - * consistent. - */ + /* Check validity and table match */ + if (!pte_is_valid(tlb->pte0) || ((tlb->pte0 >> 6) & 1) != 0 || + (tlb->pte0 & PTE_PTEM_MASK) != ctx->ptem) { + continue; + } + /* all matches should have equal RPN, WIMG & PP */ + if (ctx->raddr != (hwaddr)-1ULL && + (ctx->raddr & PTE_CHECK_MASK) != (tlb->pte1 & PTE_CHECK_MASK)) { + qemu_log_mask(CPU_LOG_MMU, "Bad RPN/WIMG/PP\n"); + /* TLB inconsistency */ + continue; + } + /* Keep the matching PTE information */ + best = nr; + ctx->raddr = tlb->pte1; + ctx->prot = ppc_hash32_prot(ctx->key, tlb->pte1 & HPTE32_R_PP, nx); + if (check_prot_access_type(ctx->prot, access_type)) { + qemu_log_mask(CPU_LOG_MMU, "PTE access granted !\n"); ret = 0; - best = nr; - goto done; + break; + } else { + qemu_log_mask(CPU_LOG_MMU, "PTE access rejected\n"); + ret = -2; } } if (best != -1) { -done: qemu_log_mask(CPU_LOG_MMU, "found TLB at addr " HWADDR_FMT_plx " prot=%01x ret=%d\n", ctx->raddr & TARGET_PAGE_MASK, ctx->prot, ret);