diff mbox series

[RFC,2/3] hw/arm: Connect STM32L4x5 GPIO to STM32L4x5 SoC

Message ID 20240112170635.303226-3-ines.varhol@telecom-paris.fr
State New
Headers show
Series Add device STM32L4x5 GPIO | expand

Commit Message

Inès Varhol Jan. 12, 2024, 5:05 p.m. UTC 
Signed-off-by: Arnaud Minier <arnaud.minier@telecom-paris.fr>
Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr>
---
 hw/arm/Kconfig                 |  3 +-
 hw/arm/stm32l4x5_soc.c         | 62 +++++++++++++++++++++++++++-------
 include/hw/arm/stm32l4x5_soc.h |  9 +++++
 3 files changed, 60 insertions(+), 14 deletions(-)
diff mbox series

Patch

diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index bb4693bfbb..cb05147b64 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -459,8 +459,9 @@  config STM32L4X5_SOC
     bool
     select ARM_V7M
     select OR_IRQ
-    select STM32L4X5_SYSCFG
     select STM32L4X5_EXTI
+    select STM32L4X5_SYSCFG
+    select STM32L4X5_GPIO
 
 config XLNX_ZYNQMP_ARM
     bool
diff --git a/hw/arm/stm32l4x5_soc.c b/hw/arm/stm32l4x5_soc.c
index 431f982caf..56a9a6affb 100644
--- a/hw/arm/stm32l4x5_soc.c
+++ b/hw/arm/stm32l4x5_soc.c
@@ -76,6 +76,17 @@  static const int exti_irq[NUM_EXTI_IRQ] = {
     78                      /* LCD wakeup, Direct      */
 };
 
+static const uint32_t gpio_addr[] = {
+    0x48000000,
+    0x48000400,
+    0x48000800,
+    0x48000C00,
+    0x48001000,
+    0x48001400,
+    0x48001800,
+    0x48001C00,
+};
+
 static void stm32l4x5_soc_initfn(Object *obj)
 {
     Stm32l4x5SocState *s = STM32L4X5_SOC(obj);
@@ -83,6 +94,15 @@  static void stm32l4x5_soc_initfn(Object *obj)
     object_initialize_child(obj, "exti", &s->exti, TYPE_STM32L4X5_EXTI);
     object_initialize_child(obj, "syscfg", &s->syscfg, TYPE_STM32L4X5_SYSCFG);
 
+    object_initialize_child(obj, "gpioa", &s->gpioa, TYPE_STM32L4X5_GPIO_A);
+    object_initialize_child(obj, "gpiob", &s->gpiob, TYPE_STM32L4X5_GPIO_B);
+    object_initialize_child(obj, "gpioc", &s->gpioc, TYPE_STM32L4X5_GPIO_C);
+    object_initialize_child(obj, "gpiod", &s->gpiod, TYPE_STM32L4X5_GPIO_D);
+    object_initialize_child(obj, "gpioe", &s->gpioe, TYPE_STM32L4X5_GPIO_E);
+    object_initialize_child(obj, "gpiof", &s->gpiof, TYPE_STM32L4X5_GPIO_F);
+    object_initialize_child(obj, "gpiog", &s->gpiog, TYPE_STM32L4X5_GPIO_G);
+    object_initialize_child(obj, "gpioh", &s->gpioh, TYPE_STM32L4X5_GPIO_H);
+
     s->sysclk = qdev_init_clock_in(DEVICE(s), "sysclk", NULL, NULL, 0);
     s->refclk = qdev_init_clock_in(DEVICE(s), "refclk", NULL, NULL, 0);
 }
@@ -95,6 +115,7 @@  static void stm32l4x5_soc_realize(DeviceState *dev_soc, Error **errp)
     MemoryRegion *system_memory = get_system_memory();
     DeviceState *armv7m;
     SysBusDevice *busdev;
+    uint32_t pin_index;
 
     /*
      * We use s->refclk internally and only define it with qdev_init_clock_in()
@@ -156,17 +177,40 @@  static void stm32l4x5_soc_realize(DeviceState *dev_soc, Error **errp)
         return;
     }
 
+    /* GPIOs */
+   const Stm32l4x5GpioState *gpios[] = {
+        &s->gpioa,
+        &s->gpiob,
+        &s->gpioc,
+        &s->gpiod,
+        &s->gpioe,
+        &s->gpiof,
+        &s->gpiog,
+        &s->gpioh,
+    };
+    for (unsigned i = 0; i < NUM_GPIOS; i++) {
+        busdev = SYS_BUS_DEVICE(gpios[i]);
+        if (!sysbus_realize(busdev, errp)) {
+            return;
+        }
+        sysbus_mmio_map(busdev, 0, gpio_addr[i]);
+    }
+
     /* System configuration controller */
     busdev = SYS_BUS_DEVICE(&s->syscfg);
     if (!sysbus_realize(busdev, errp)) {
         return;
     }
     sysbus_mmio_map(busdev, 0, SYSCFG_ADDR);
-    /*
-     * TODO: when the GPIO device is implemented, connect it
-     * to SYCFG using `qdev_connect_gpio_out`, NUM_GPIOS and
-     * GPIO_NUM_PINS.
-     */
+
+    for (unsigned i = 0; i < NUM_GPIOS; i++) {
+        for (unsigned j = 0; j < GPIO_NUM_PINS; j++) {
+            pin_index = GPIO_NUM_PINS * i + j;
+            qdev_connect_gpio_out(DEVICE(gpios[i]), j,
+                                  qdev_get_gpio_in(DEVICE(&s->syscfg),
+                                  pin_index));
+        }
+    }
 
     /* EXTI device */
     busdev = SYS_BUS_DEVICE(&s->exti);
@@ -256,14 +300,6 @@  static void stm32l4x5_soc_realize(DeviceState *dev_soc, Error **errp)
     /* RESERVED:    0x40024400, 0x7FDBC00 */
 
     /* AHB2 BUS */
-    create_unimplemented_device("GPIOA",     0x48000000, 0x400);
-    create_unimplemented_device("GPIOB",     0x48000400, 0x400);
-    create_unimplemented_device("GPIOC",     0x48000800, 0x400);
-    create_unimplemented_device("GPIOD",     0x48000C00, 0x400);
-    create_unimplemented_device("GPIOE",     0x48001000, 0x400);
-    create_unimplemented_device("GPIOF",     0x48001400, 0x400);
-    create_unimplemented_device("GPIOG",     0x48001800, 0x400);
-    create_unimplemented_device("GPIOH",     0x48001C00, 0x400);
     /* RESERVED:    0x48002000, 0x7FDBC00 */
     create_unimplemented_device("OTG_FS",    0x50000000, 0x40000);
     create_unimplemented_device("ADC",       0x50040000, 0x400);
diff --git a/include/hw/arm/stm32l4x5_soc.h b/include/hw/arm/stm32l4x5_soc.h
index baf70410b5..c8aff07b6d 100644
--- a/include/hw/arm/stm32l4x5_soc.h
+++ b/include/hw/arm/stm32l4x5_soc.h
@@ -28,6 +28,7 @@ 
 #include "hw/arm/armv7m.h"
 #include "hw/misc/stm32l4x5_syscfg.h"
 #include "hw/misc/stm32l4x5_exti.h"
+#include "hw/gpio/stm32l4x5_gpio.h"
 #include "qom/object.h"
 
 #define TYPE_STM32L4X5_SOC "stm32l4x5-soc"
@@ -43,6 +44,14 @@  struct Stm32l4x5SocState {
 
     Stm32l4x5ExtiState exti;
     Stm32l4x5SyscfgState syscfg;
+    Stm32l4x5GpioState gpioa;
+    Stm32l4x5GpioState gpiob;
+    Stm32l4x5GpioState gpioc;
+    Stm32l4x5GpioState gpiod;
+    Stm32l4x5GpioState gpioe;
+    Stm32l4x5GpioState gpiof;
+    Stm32l4x5GpioState gpiog;
+    Stm32l4x5GpioState gpioh;
 
     MemoryRegion sram1;
     MemoryRegion sram2;