diff mbox series

sbsa-ref: remove cortex-a76 from list of supported cpus

Message ID 20230126114416.2447685-1-marcin.juszkiewicz@linaro.org
State New
Headers show
Series sbsa-ref: remove cortex-a76 from list of supported cpus | expand

Commit Message

Marcin Juszkiewicz Jan. 26, 2023, 11:44 a.m. UTC
Cortex-A76 supports 40bits of address space. sbsa-ref's memory
starts above this limit.

Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
---
 hw/arm/sbsa-ref.c | 1 -
 1 file changed, 1 deletion(-)

Comments

Alex Bennée Jan. 26, 2023, 2:12 p.m. UTC | #1
Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> writes:

> Cortex-A76 supports 40bits of address space. sbsa-ref's memory
> starts above this limit.
>
> Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Richard Henderson Jan. 26, 2023, 3:38 p.m. UTC | #2
On 1/26/23 01:44, Marcin Juszkiewicz wrote:
> Cortex-A76 supports 40bits of address space. sbsa-ref's memory
> starts above this limit.
> 
> Signed-off-by: Marcin Juszkiewicz<marcin.juszkiewicz@linaro.org>
> ---
>   hw/arm/sbsa-ref.c | 1 -
>   1 file changed, 1 deletion(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~
Peter Maydell Feb. 2, 2023, 5:58 p.m. UTC | #3
On Thu, 26 Jan 2023 at 11:44, Marcin Juszkiewicz
<marcin.juszkiewicz@linaro.org> wrote:
>
> Cortex-A76 supports 40bits of address space. sbsa-ref's memory
> starts above this limit.
>
> Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
> ---
>  hw/arm/sbsa-ref.c | 1 -
>  1 file changed, 1 deletion(-)
>



Applied to target-arm.next, thanks.

-- PMM
diff mbox series

Patch

diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c
index 4bb444684f..67c1f68c54 100644
--- a/hw/arm/sbsa-ref.c
+++ b/hw/arm/sbsa-ref.c
@@ -145,7 +145,6 @@  static const int sbsa_ref_irqmap[] = {
 static const char * const valid_cpus[] = {
     ARM_CPU_TYPE_NAME("cortex-a57"),
     ARM_CPU_TYPE_NAME("cortex-a72"),
-    ARM_CPU_TYPE_NAME("cortex-a76"),
     ARM_CPU_TYPE_NAME("neoverse-n1"),
     ARM_CPU_TYPE_NAME("max"),
 };