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[81.231.232.130]) by smtp.gmail.com with ESMTPSA id l26sm2166500lfj.22.2020.08.24.03.00.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 24 Aug 2020 03:00:43 -0700 (PDT) From: "Edgar E. Iglesias" To: qemu-devel@nongnu.org Subject: [PULL v1 1/8] target/microblaze: mbar: Transfer dc->rd to mbar_imm Date: Mon, 24 Aug 2020 12:00:34 +0200 Message-Id: <20200824100041.1864420-2-edgar.iglesias@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200824100041.1864420-1-edgar.iglesias@gmail.com> References: <20200824100041.1864420-1-edgar.iglesias@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::242; envelope-from=edgar.iglesias@gmail.com; helo=mail-lj1-x242.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: 16 X-Spam_score: 1.6 X-Spam_bar: + X-Spam_report: (1.6 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, FSL_HELO_FAKE=3.724, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: edgar.iglesias@xilinx.com, peter.maydell@linaro.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: "Edgar E. Iglesias" Transfer dc->rd to mbar_imm to improve the readability when comparing to the specs. No functional change. Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Signed-off-by: Edgar E. Iglesias --- target/microblaze/translate.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c index f6ff2591c3..47637f152b 100644 --- a/target/microblaze/translate.c +++ b/target/microblaze/translate.c @@ -1229,8 +1229,10 @@ static void dec_br(DisasContext *dc) /* Memory barrier. */ mbar = (dc->ir >> 16) & 31; if (mbar == 2 && dc->imm == 4) { + uint16_t mbar_imm = dc->rd; + /* mbar IMM & 16 decodes to sleep. */ - if (dc->rd & 16) { + if (mbar_imm & 16) { TCGv_i32 tmp_hlt = tcg_const_i32(EXCP_HLT); TCGv_i32 tmp_1 = tcg_const_i32(1); @@ -1246,7 +1248,7 @@ static void dec_br(DisasContext *dc) tcg_temp_free_i32(tmp_1); return; } - LOG_DIS("mbar %d\n", dc->rd); + LOG_DIS("mbar %d\n", mbar_imm); /* Break the TB. */ dc->cpustate_changed = 1; return;