From patchwork Fri Mar 8 01:32:12 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1053325 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=redhat.com Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 44FqyD0MbNz9s9N for ; Fri, 8 Mar 2019 12:42:59 +1100 (AEDT) Received: from localhost ([127.0.0.1]:34640 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h24XJ-0001wr-Ag for incoming@patchwork.ozlabs.org; Thu, 07 Mar 2019 20:42:57 -0500 Received: from eggs.gnu.org ([209.51.188.92]:57769) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h24Ol-0002sX-Op for qemu-devel@nongnu.org; Thu, 07 Mar 2019 20:34:08 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1h24Oj-0001S5-PG for qemu-devel@nongnu.org; Thu, 07 Mar 2019 20:34:07 -0500 Received: from mx1.redhat.com ([209.132.183.28]:36912) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1h24Oa-0001Fk-A3; Thu, 07 Mar 2019 20:33:58 -0500 Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 1732287637; Fri, 8 Mar 2019 01:33:54 +0000 (UTC) Received: from x1w.redhat.com (unknown [10.40.206.18]) by smtp.corp.redhat.com (Postfix) with ESMTPS id D680260BE5; Fri, 8 Mar 2019 01:33:46 +0000 (UTC) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: Laszlo Ersek , Gerd Hoffmann , "Michael S. Tsirkin" , qemu-devel@nongnu.org Date: Fri, 8 Mar 2019 02:32:12 +0100 Message-Id: <20190308013222.12524-9-philmd@redhat.com> In-Reply-To: <20190308013222.12524-1-philmd@redhat.com> References: <20190308013222.12524-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.26]); Fri, 08 Mar 2019 01:33:54 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 08/18] hw/nvram/fw_cfg: Move fw_cfg_file_slots_allocate() to common_realize() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Thomas Huth , Eduardo Habkost , Mark Cave-Ayland , "Dr. David Alan Gilbert" , Markus Armbruster , qemu-arm@nongnu.org, qemu-ppc@nongnu.org, Igor Mammedov , Paolo Bonzini , David Gibson , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Artyom Tarasenko , Richard Henderson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Each implementation (I/O and MEM) calls fw_cfg_file_slots_allocate() then fw_cfg_common_realize(). Simplify by moving the fw_cfg_file_slots_allocate() call into fw_cfg_common_realize() where it belongs. Signed-off-by: Philippe Mathieu-Daudé --- hw/nvram/fw_cfg.c | 17 ++++++++++------- 1 file changed, 10 insertions(+), 7 deletions(-) diff --git a/hw/nvram/fw_cfg.c b/hw/nvram/fw_cfg.c index 0fb020edce..ca58d279a4 100644 --- a/hw/nvram/fw_cfg.c +++ b/hw/nvram/fw_cfg.c @@ -929,19 +929,26 @@ static void fw_cfg_machine_ready(struct Notifier *n, void *data) qemu_register_reset(fw_cfg_machine_reset, s); } - +static void fw_cfg_file_slots_allocate(FWCfgState *s, Error **errp); static void fw_cfg_common_realize(DeviceState *dev, Error **errp) { FWCfgState *s = FW_CFG(dev); MachineState *machine = MACHINE(qdev_get_machine()); uint32_t version = FW_CFG_VERSION; + Error *local_err = NULL; if (!fw_cfg_find()) { error_setg(errp, "at most one %s device is permitted", TYPE_FW_CFG); return; } + fw_cfg_file_slots_allocate(s, &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } + fw_cfg_add_bytes(s, FW_CFG_SIGNATURE, (char *)"QEMU", 4); fw_cfg_add_bytes(s, FW_CFG_UUID, &qemu_uuid, 16); fw_cfg_add_i16(s, FW_CFG_NOGRAPHIC, (uint16_t)!machine->enable_graphics); @@ -1108,7 +1115,7 @@ static void fw_cfg_io_realize(DeviceState *dev, Error **errp) FWCfgIoState *s = FW_CFG_IO(dev); Error *local_err = NULL; - fw_cfg_file_slots_allocate(FW_CFG(s), &local_err); + fw_cfg_common_realize(dev, &local_err); if (local_err) { error_propagate(errp, local_err); return; @@ -1125,8 +1132,6 @@ static void fw_cfg_io_realize(DeviceState *dev, Error **errp) &fw_cfg_dma_mem_ops, FW_CFG(s), "fwcfg.dma", sizeof(dma_addr_t)); } - - fw_cfg_common_realize(dev, errp); } static void fw_cfg_io_class_init(ObjectClass *klass, void *data) @@ -1162,7 +1167,7 @@ static void fw_cfg_mem_realize(DeviceState *dev, Error **errp) const MemoryRegionOps *data_ops = &fw_cfg_data_mem_ops; Error *local_err = NULL; - fw_cfg_file_slots_allocate(FW_CFG(s), &local_err); + fw_cfg_common_realize(dev, &local_err); if (local_err) { error_propagate(errp, local_err); return; @@ -1189,8 +1194,6 @@ static void fw_cfg_mem_realize(DeviceState *dev, Error **errp) sizeof(dma_addr_t)); sysbus_init_mmio(sbd, &FW_CFG(s)->dma_iomem); } - - fw_cfg_common_realize(dev, errp); } static void fw_cfg_mem_class_init(ObjectClass *klass, void *data)