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[81.231.232.130]) by smtp.gmail.com with ESMTPSA id g14-v6sm1510456lfb.36.2018.06.15.08.03.47 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 15 Jun 2018 08:03:48 -0700 (PDT) From: "Edgar E. Iglesias" To: qemu-devel@nongnu.org Date: Fri, 15 Jun 2018 17:03:43 +0200 Message-Id: <20180615150343.4937-3-edgar.iglesias@gmail.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20180615150343.4937-1-edgar.iglesias@gmail.com> References: <20180615150343.4937-1-edgar.iglesias@gmail.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4010:c07::244 Subject: [Qemu-devel] [PULL v1 2/2] target-microblaze: Rework NOP/zero instruction handling X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: edgar.iglesias@xilinx.com, peter.maydell@linaro.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: "Edgar E. Iglesias" Remove the abort on a sequence of NOP/zero instructions. Always return early and avoid decoding NOP/zero instructions. This fixes Coverity CID 1391443. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Edgar E. Iglesias --- target/microblaze/translate.c | 15 ++++----------- 1 file changed, 4 insertions(+), 11 deletions(-) diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c index 6c64946398..78ca265b04 100644 --- a/target/microblaze/translate.c +++ b/target/microblaze/translate.c @@ -90,7 +90,6 @@ typedef struct DisasContext { uint32_t jmp_pc; int abort_at_next_insn; - int nr_nops; struct TranslationBlock *tb; int singlestep_enabled; } DisasContext; @@ -1576,17 +1575,12 @@ static inline void decode(DisasContext *dc, uint32_t ir) dc->ir = ir; LOG_DIS("%8.8x\t", dc->ir); - if (dc->ir) - dc->nr_nops = 0; - else { + if (ir == 0) { trap_illegal(dc, dc->cpu->env.pvr.regs[2] & PVR2_OPCODE_0x0_ILL_MASK); - - LOG_DIS("nr_nops=%d\t", dc->nr_nops); - dc->nr_nops++; - if (dc->nr_nops > 4) { - cpu_abort(CPU(dc->cpu), "fetching nop sequence\n"); - } + /* Don't decode nop/zero instructions any further. */ + return; } + /* bit 2 seems to indicate insn type. */ dc->type_b = ir & (1 << 29); @@ -1633,7 +1627,6 @@ void gen_intermediate_code(CPUState *cs, struct TranslationBlock *tb) dc->singlestep_enabled = cs->singlestep_enabled; dc->cpustate_changed = 0; dc->abort_at_next_insn = 0; - dc->nr_nops = 0; if (pc_start & 3) { cpu_abort(cs, "Microblaze: unaligned PC=%x\n", pc_start);