From patchwork Tue May 29 10:49:51 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Edgar E. Iglesias" X-Patchwork-Id: 921991 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="ZUBklRiB"; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 40wB1K5YqSz9s0W for ; Tue, 29 May 2018 21:13:41 +1000 (AEST) Received: from localhost ([::1]:60215 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fNcZO-0002Vb-Ev for incoming@patchwork.ozlabs.org; Tue, 29 May 2018 07:13:38 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:36984) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fNcDF-0001WJ-3T for qemu-devel@nongnu.org; Tue, 29 May 2018 06:50:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fNcDE-00042J-66 for qemu-devel@nongnu.org; Tue, 29 May 2018 06:50:45 -0400 Received: from mail-wm0-x244.google.com ([2a00:1450:400c:c09::244]:36638) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fNcDD-00041q-VD for qemu-devel@nongnu.org; Tue, 29 May 2018 06:50:44 -0400 Received: by mail-wm0-x244.google.com with SMTP id v131-v6so20047731wma.1 for ; Tue, 29 May 2018 03:50:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=iP9/dfdwQQzvrsNqx5vNhxrbYFdUnz0mglWxSwODAzI=; b=ZUBklRiBMvrRi0DexJVwdM0XChQb942M+jr1yVuBv+moN0suuiPYIu/sR8rJQY7wRF Qc97p+i5MtUVWKS1NCUSsYCLtqiz/gwwh+MaW3UPCCPDMPs/W7rZNo/Qa/0jqZo5sZnT 1rIHpFopSvH8As3EFCFT65JK53TAzZl3AF91gSbFqROwwsJ6nEoIRwKOy7XKQkYAlXdt nSE9bsEqtN/DZf8Bct/Exnw6ICuVkqS9PkbGykX8i+BnYCjsaA2ek6aAvw/CmVsBhZ/U bYwgSd9JCxO6hEPs8EvSsix/xtQTmQ25tgwV8KV37sHEIM8M+GV2/+mMxRlRXy8LQead /j8Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=iP9/dfdwQQzvrsNqx5vNhxrbYFdUnz0mglWxSwODAzI=; b=bTRLnmOtIQDiiP9jfGZCpX6ExaguIDXb68qJpmp92tE3b7uLDbGCbz/up/x2bNgvny JH0ITzv3cLXiaxzO33ag9U4iKerK1OPQfuJ8mfZs531Tv4SJZm8Q8upkXHSyuzOhkvFQ zH/l5GNnjbwUJWmzh6LrstbwhoksyakSEb4fxpYr40Vc7NywUdzhOk3HjtaA69KkcAn9 OqsOKXRSSH1pO3m9MO1Mu0PcAhujpf0EwV5x/7Ikuj2UavPUChNfCBZkC6d5mWwe0ajA 4xt74LXjNpViZi+BYbIZjgPVZ6FbzL7ZvxnvdIEI0KyK454Dl5GSNxn8zePJ5QaDqXfC XkIg== X-Gm-Message-State: ALKqPweSseSzkmPWQ2jcEHKe/dSF+neNrn+/kBLLfg0u1IwpXUBksars TUpOi/swp3/TsLqFikbuxWAwCw== X-Google-Smtp-Source: AB8JxZorF0rbQekqGDZTPp4pe3tIYt5AJCUPzTpTN5THXBqAgg9sLBenjqP/PSu43l77cN29zFnQKg== X-Received: by 2002:a2e:6a07:: with SMTP id f7-v6mr10699864ljc.145.1527591042655; Tue, 29 May 2018 03:50:42 -0700 (PDT) Received: from gmail.com (81-231-232-130-no39.tbcn.telia.com. [81.231.232.130]) by smtp.gmail.com with ESMTPSA id e14-v6sm1835040ljg.78.2018.05.29.03.50.41 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 29 May 2018 03:50:41 -0700 (PDT) From: "Edgar E. Iglesias" To: qemu-devel@nongnu.org Date: Tue, 29 May 2018 12:49:51 +0200 Message-Id: <20180529105011.1914-19-edgar.iglesias@gmail.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20180529105011.1914-1-edgar.iglesias@gmail.com> References: <20180529105011.1914-1-edgar.iglesias@gmail.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:400c:c09::244 Subject: [Qemu-devel] [PULL v1 18/38] target-microblaze: dec_msr: Reuse more code when reg-decoding X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: edgar.iglesias@xilinx.com, peter.maydell@linaro.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: "Edgar E. Iglesias" Reuse more code when decoding register numbers. No functional changes. Reviewed-by: Alistair Francis Reviewed-by: Richard Henderson Signed-off-by: Edgar E. Iglesias --- target/microblaze/translate.c | 38 +++++++++----------------------------- 1 file changed, 9 insertions(+), 29 deletions(-) diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c index e322c82c06..6a270fbece 100644 --- a/target/microblaze/translate.c +++ b/target/microblaze/translate.c @@ -531,11 +531,9 @@ static void dec_msr(DisasContext *dc) case 1: msr_write(dc, cpu_R[dc->ra]); break; - case 0x3: - tcg_gen_mov_i32(cpu_SR[SR_EAR], cpu_R[dc->ra]); - break; - case 0x5: - tcg_gen_mov_i32(cpu_SR[SR_ESR], cpu_R[dc->ra]); + case SR_EAR: + case SR_ESR: + tcg_gen_mov_i32(cpu_SR[sr], cpu_R[dc->ra]); break; case 0x7: tcg_gen_andi_i32(cpu_SR[SR_FSR], cpu_R[dc->ra], 31); @@ -562,17 +560,11 @@ static void dec_msr(DisasContext *dc) case 1: msr_read(dc, cpu_R[dc->rd]); break; - case 0x3: - tcg_gen_mov_i32(cpu_R[dc->rd], cpu_SR[SR_EAR]); - break; - case 0x5: - tcg_gen_mov_i32(cpu_R[dc->rd], cpu_SR[SR_ESR]); - break; - case 0x7: - tcg_gen_mov_i32(cpu_R[dc->rd], cpu_SR[SR_FSR]); - break; - case 0xb: - tcg_gen_mov_i32(cpu_R[dc->rd], cpu_SR[SR_BTR]); + case SR_EAR: + case SR_ESR: + case SR_FSR: + case SR_BTR: + tcg_gen_mov_i32(cpu_R[dc->rd], cpu_SR[sr]); break; case 0x800: tcg_gen_ld_i32(cpu_R[dc->rd], @@ -582,19 +574,7 @@ static void dec_msr(DisasContext *dc) tcg_gen_ld_i32(cpu_R[dc->rd], cpu_env, offsetof(CPUMBState, shr)); break; - case 0x2000: - case 0x2001: - case 0x2002: - case 0x2003: - case 0x2004: - case 0x2005: - case 0x2006: - case 0x2007: - case 0x2008: - case 0x2009: - case 0x200a: - case 0x200b: - case 0x200c: + case 0x2000 ... 0x200c: rn = sr & 0xf; tcg_gen_ld_i32(cpu_R[dc->rd], cpu_env, offsetof(CPUMBState, pvr.regs[rn]));