diff mbox series

[v1,08/29] target-microblaze: Remove USE_MMU PVR checks

Message ID 20180503091922.28733-9-edgar.iglesias@gmail.com
State New
Headers show
Series [v1,01/29] target-microblaze: dec_load: Use bool instead of unsigned int | expand

Commit Message

Edgar E. Iglesias May 3, 2018, 9:19 a.m. UTC 
From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>

We already have a CPU property to control if a core has
an MMU or not. Remove USE_MMU PVR checks in favor of
looking at the property.

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
---
 target/microblaze/helper.c | 12 +-----------
 1 file changed, 1 insertion(+), 11 deletions(-)

Comments

Alistair Francis May 3, 2018, 8:12 p.m. UTC | #1 
On Thu, May 3, 2018 at 2:31 AM Edgar E. Iglesias <edgar.iglesias@gmail.com>
wrote:

> From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>

> We already have a CPU property to control if a core has
> an MMU or not. Remove USE_MMU PVR checks in favor of
> looking at the property.

> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>   target/microblaze/helper.c | 12 +-----------
>   1 file changed, 1 insertion(+), 11 deletions(-)

> diff --git a/target/microblaze/helper.c b/target/microblaze/helper.c
> index 387d4aca5a..a9f4ca93e3 100644
> --- a/target/microblaze/helper.c
> +++ b/target/microblaze/helper.c
> @@ -54,21 +54,11 @@ int mb_cpu_handle_mmu_fault(CPUState *cs, vaddr
address, int size, int rw,
>       MicroBlazeCPU *cpu = MICROBLAZE_CPU(cs);
>       CPUMBState *env = &cpu->env;
>       unsigned int hit;
> -    unsigned int mmu_available;
>       int r = 1;
>       int prot;

> -    mmu_available = 0;
> -    if (cpu->cfg.use_mmu) {
> -        mmu_available = 1;
> -        if ((cpu->cfg.pvr == C_PVR_FULL) &&
> -            (env->pvr.regs[11] & PVR11_USE_MMU) != PVR11_USE_MMU) {
> -            mmu_available = 0;
> -        }
> -    }
> -
>       /* Translate if the MMU is available and enabled.  */
> -    if (mmu_available && (env->sregs[SR_MSR] & MSR_VM)) {
> +    if (cpu->cfg.use_mmu && (env->sregs[SR_MSR] & MSR_VM)) {
>           uint32_t vaddr, paddr;
>           struct microblaze_mmu_lookup lu;

> --
> 2.14.1
diff mbox series

Patch

diff --git a/target/microblaze/helper.c b/target/microblaze/helper.c
index 387d4aca5a..a9f4ca93e3 100644
--- a/target/microblaze/helper.c
+++ b/target/microblaze/helper.c
@@ -54,21 +54,11 @@  int mb_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, int rw,
     MicroBlazeCPU *cpu = MICROBLAZE_CPU(cs);
     CPUMBState *env = &cpu->env;
     unsigned int hit;
-    unsigned int mmu_available;
     int r = 1;
     int prot;
 
-    mmu_available = 0;
-    if (cpu->cfg.use_mmu) {
-        mmu_available = 1;
-        if ((cpu->cfg.pvr == C_PVR_FULL) &&
-            (env->pvr.regs[11] & PVR11_USE_MMU) != PVR11_USE_MMU) {
-            mmu_available = 0;
-        }
-    }
-
     /* Translate if the MMU is available and enabled.  */
-    if (mmu_available && (env->sregs[SR_MSR] & MSR_VM)) {
+    if (cpu->cfg.use_mmu && (env->sregs[SR_MSR] & MSR_VM)) {
         uint32_t vaddr, paddr;
         struct microblaze_mmu_lookup lu;