| Message ID | 20180503091922.28733-10-edgar.iglesias@gmail.com |
|---|---|
| State | New |
| Headers | show |
| Series | [v1,01/29] target-microblaze: dec_load: Use bool instead of unsigned int | expand |
On Thu, May 3, 2018 at 2:22 AM Edgar E. Iglesias <edgar.iglesias@gmail.com> wrote: > From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com> > Conditionalize setting of PVR11_USE_MMU on the use_mmu > CPU property, otherwise we may incorrectly advertise an > MMU via PVR when the core in fact has none. > Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Alistair > --- > target/microblaze/cpu.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c > index 06476f6efc..6fdf0fd223 100644 > --- a/target/microblaze/cpu.c > +++ b/target/microblaze/cpu.c > @@ -201,7 +201,8 @@ static void mb_cpu_realizefn(DeviceState *dev, Error **errp) > PVR5_DCACHE_WRITEBACK_MASK : 0; > env->pvr.regs[10] = 0x0c000000; /* Default to spartan 3a dsp family. */ > - env->pvr.regs[11] = PVR11_USE_MMU | (16 << 17); > + env->pvr.regs[11] = cpu->cfg.use_mmu ? PVR11_USE_MMU : 0 | > + 16 << 17; > mcc->parent_realize(dev, errp); > } > -- > 2.14.1
diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c index 06476f6efc..6fdf0fd223 100644 --- a/target/microblaze/cpu.c +++ b/target/microblaze/cpu.c @@ -201,7 +201,8 @@ static void mb_cpu_realizefn(DeviceState *dev, Error **errp) PVR5_DCACHE_WRITEBACK_MASK : 0; env->pvr.regs[10] = 0x0c000000; /* Default to spartan 3a dsp family. */ - env->pvr.regs[11] = PVR11_USE_MMU | (16 << 17); + env->pvr.regs[11] = cpu->cfg.use_mmu ? PVR11_USE_MMU : 0 | + 16 << 17; mcc->parent_realize(dev, errp); }