diff mbox series

[v1,4/5] target-microblaze: mmu: Make TLBSX write-only

Message ID 20180419112131.16932-5-edgar.iglesias@gmail.com
State New
Headers show
Series target-microblaze: Misc bug fixes | expand

Commit Message

Edgar E. Iglesias April 19, 2018, 11:21 a.m. UTC 
From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>

Make TLBSX write-only and guest-error log reads from it.

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
---
 target/microblaze/mmu.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

Comments

Alistair Francis April 19, 2018, 11:10 p.m. UTC | #1 
On Thu, Apr 19, 2018 at 4:21 AM, Edgar E. Iglesias
<edgar.iglesias@gmail.com> wrote:
> From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
>
> Make TLBSX write-only and guest-error log reads from it.
>
> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  target/microblaze/mmu.c | 5 ++++-
>  1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/target/microblaze/mmu.c b/target/microblaze/mmu.c
> index a0f06758f8..8391811900 100644
> --- a/target/microblaze/mmu.c
> +++ b/target/microblaze/mmu.c
> @@ -182,7 +182,7 @@ done:
>  uint32_t mmu_read(CPUMBState *env, uint32_t rn)
>  {
>      unsigned int i;
> -    uint32_t r;
> +    uint32_t r = 0;
>
>      if (env->mmu.c_mmu < 2 || !env->mmu.c_mmu_tlb_access) {
>          qemu_log_mask(LOG_GUEST_ERROR, "MMU access on MMU-less system\n");
> @@ -211,6 +211,9 @@ uint32_t mmu_read(CPUMBState *env, uint32_t rn)
>              }
>              r = env->mmu.regs[rn];
>              break;
> +        case MMU_R_TLBSX:
> +            qemu_log_mask(LOG_GUEST_ERROR, "TLBSX is write-only.\n");
> +            break;
>          default:
>              r = env->mmu.regs[rn];
>              break;
> --
> 2.14.1
>
>
diff mbox series

Patch

diff --git a/target/microblaze/mmu.c b/target/microblaze/mmu.c
index a0f06758f8..8391811900 100644
--- a/target/microblaze/mmu.c
+++ b/target/microblaze/mmu.c
@@ -182,7 +182,7 @@  done:
 uint32_t mmu_read(CPUMBState *env, uint32_t rn)
 {
     unsigned int i;
-    uint32_t r;
+    uint32_t r = 0;
 
     if (env->mmu.c_mmu < 2 || !env->mmu.c_mmu_tlb_access) {
         qemu_log_mask(LOG_GUEST_ERROR, "MMU access on MMU-less system\n");
@@ -211,6 +211,9 @@  uint32_t mmu_read(CPUMBState *env, uint32_t rn)
             }
             r = env->mmu.regs[rn];
             break;
+        case MMU_R_TLBSX:
+            qemu_log_mask(LOG_GUEST_ERROR, "TLBSX is write-only.\n");
+            break;
         default:
             r = env->mmu.regs[rn];
             break;