From patchwork Sat May 22 10:52:40 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Igor V. Kovalenko" X-Patchwork-Id: 53270 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 8BF34B7D2D for ; Sat, 22 May 2010 21:03:14 +1000 (EST) Received: from localhost ([127.0.0.1]:51061 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OFmU3-0001BB-C0 for incoming@patchwork.ozlabs.org; Sat, 22 May 2010 07:03:11 -0400 Received: from [140.186.70.92] (port=53532 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OFmJw-0003PE-0f for qemu-devel@nongnu.org; Sat, 22 May 2010 06:52:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1OFmJu-0004Ql-Dn for qemu-devel@nongnu.org; Sat, 22 May 2010 06:52:43 -0400 Received: from mail-fx0-f45.google.com ([209.85.161.45]:45113) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1OFmJu-0004M6-99 for qemu-devel@nongnu.org; Sat, 22 May 2010 06:52:42 -0400 Received: by mail-fx0-f45.google.com with SMTP id 14so550821fxm.4 for ; Sat, 22 May 2010 03:52:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:received:subject:to:from:date :message-id:in-reply-to:references:user-agent:mime-version :content-type:content-transfer-encoding; bh=lWxhWZQ1wEG+BWJLMrsoqKofZuEyIAFbkJCBsmUJgaE=; b=PlawzgAbhg0UmPkpRBw4SbQmNwrYUg8iehuW7gLsQNso7ntQCZbryyAU5ciPDBXnc9 +EmAYpFWLJS6eS/UB78BTb0eE2ZVw/BmomKmXl/6R67DGka9gsw3j1sJqUaGwhCdnvBb rA8QFSi+443pz0DlMTvAAFloYgMrIdbJeV3UA= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=subject:to:from:date:message-id:in-reply-to:references:user-agent :mime-version:content-type:content-transfer-encoding; b=AIgvxlzXgF8e/dJrdHeUkmBb/E4m///In5L8J1EXHgFfrunwthqerfG53GIHpsVrGA rWoFAIsdjzExgflVsLgvtc9cSd9dnXXFMTmUM0dLGULF+dHnBNX06qXZOuMAuTEGUqS5 rz4jixRV3ZR/cswQQAZxCyj3x8OjdhLGnMVVQ= Received: by 10.223.20.216 with SMTP id g24mr2510500fab.63.1274525561830; Sat, 22 May 2010 03:52:41 -0700 (PDT) Received: from skyserv ([87.255.14.75]) by mx.google.com with ESMTPS id 7sm9065049far.6.2010.05.22.03.52.41 (version=TLSv1/SSLv3 cipher=RC4-MD5); Sat, 22 May 2010 03:52:41 -0700 (PDT) Received: from localhost ([127.0.0.1] helo=[192.168.1.2]) by skyserv with esmtp (Exim 4.71) (envelope-from ) id 1OFmJs-0004p0-5R for qemu-devel@nongnu.org; Sat, 22 May 2010 14:52:40 +0400 To: qemu-devel@nongnu.org From: "Igor V. Kovalenko" Date: Sat, 22 May 2010 14:52:40 +0400 Message-ID: <20100522105240.18257.19008.stgit@skyserv> In-Reply-To: <20100522104440.18257.92813.stgit@skyserv> References: <20100522104440.18257.92813.stgit@skyserv> User-Agent: StGit/0.15 MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) Subject: [Qemu-devel] [PATCH 5/5] sparc64: flush translations on mmu context change X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Igor V. Kovalenko - two pairs of softmmu indexes bind softmmu tlb to cpu tlb in fault handlers using value of DMMU primary and secondary context registers, so we need to flush softmmu translations when context registers are changed Signed-off-by: Igor V. Kovalenko --- target-sparc/op_helper.c | 6 ++++++ 1 files changed, 6 insertions(+), 0 deletions(-) diff --git a/target-sparc/op_helper.c b/target-sparc/op_helper.c index 28224b2..edeeb44 100644 --- a/target-sparc/op_helper.c +++ b/target-sparc/op_helper.c @@ -2959,9 +2959,15 @@ void helper_st_asi(target_ulong addr, target_ulong val, int asi, int size) break; case 1: // Primary context env->dmmu.mmu_primary_context = val; + /* can be optimized to only flush MMU_USER_IDX + and MMU_KERNEL_IDX entries */ + tlb_flush(env, 1); break; case 2: // Secondary context env->dmmu.mmu_secondary_context = val; + /* can be optimized to only flush MMU_USER_SECONDARY_IDX + and MMU_KERNEL_SECONDARY_IDX entries */ + tlb_flush(env, 1); break; case 5: // TSB access DPRINTF_MMU("dmmu TSB write: 0x%016" PRIx64 " -> 0x%016"