From patchwork Thu Sep 8 07:25:13 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leon Alrae X-Patchwork-Id: 667352 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3sVCld5T5Fz9s36 for ; Thu, 8 Sep 2016 18:13:49 +1000 (AEST) Received: from localhost ([::1]:46136 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bhuSw-0003uK-1Z for incoming@patchwork.ozlabs.org; Thu, 08 Sep 2016 04:13:46 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41786) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bhtiJ-000230-1r for qemu-devel@nongnu.org; Thu, 08 Sep 2016 03:25:36 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bhtiD-0005GQ-Ty for qemu-devel@nongnu.org; Thu, 08 Sep 2016 03:25:33 -0400 Received: from mailapp01.imgtec.com ([195.59.15.196]:37201) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bhtiD-0005G7-OB for qemu-devel@nongnu.org; Thu, 08 Sep 2016 03:25:29 -0400 Received: from hhmail02.hh.imgtec.org (unknown [10.100.10.20]) by Forcepoint Email with ESMTPS id E9637A17405E0; Thu, 8 Sep 2016 08:25:15 +0100 (IST) Received: from hhmipssw204.hh.imgtec.org (10.100.21.121) by hhmail02.hh.imgtec.org (10.100.10.20) with Microsoft SMTP Server (TLS) id 14.3.294.0; Thu, 8 Sep 2016 08:25:18 +0100 From: Leon Alrae To: Date: Thu, 8 Sep 2016 08:25:13 +0100 Message-ID: <1473319513-10742-1-git-send-email-leon.alrae@imgtec.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 X-Originating-IP: [10.100.21.121] X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 195.59.15.196 Subject: [Qemu-devel] [PATCH] target-mips: generate fences X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: aurelien@aurel32.net Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Make use of memory barrier TCG opcode in MIPS front end. Signed-off-by: Leon Alrae Reviewed-by: Richard Henderson --- This patch complements the following series: https://lists.nongnu.org/archive/html/qemu-devel/2016-07/msg03283.html --- target-mips/translate.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target-mips/translate.c b/target-mips/translate.c index c212e4f..f4513bf 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -13384,7 +13384,7 @@ static void gen_pool32axf (CPUMIPSState *env, DisasContext *ctx, int rt, int rs) case 0x2d: switch (minor) { case SYNC: - /* NOP */ + tcg_gen_mb(TCG_MO_ALL | TCG_BAR_SC); break; case SYSCALL: generate_exception_end(ctx, EXCP_SYSCALL); @@ -17201,7 +17201,7 @@ static void decode_opc_special(CPUMIPSState *env, DisasContext *ctx) break; case OPC_SYNC: check_insn(ctx, ISA_MIPS2); - /* Treat as NOP. */ + tcg_gen_mb(TCG_MO_ALL | TCG_BAR_SC); break; #if defined(TARGET_MIPS64)