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[52.8.89.49]) by smtp.gmail.com with ESMTPSA id f9sm18043590obw.13.2016.01.20.05.49.56 (version=TLS1_2 cipher=AES128-SHA bits=128/128); Wed, 20 Jan 2016 05:49:56 -0800 (PST) From: "Edgar E. Iglesias" To: qemu-devel@nongnu.org, peter.maydell@linaro.org Date: Wed, 20 Jan 2016 14:49:40 +0100 Message-Id: <1453297780-12514-4-git-send-email-edgar.iglesias@gmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1453297780-12514-1-git-send-email-edgar.iglesias@gmail.com> References: <1453297780-12514-1-git-send-email-edgar.iglesias@gmail.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2607:f8b0:4003:c06::242 Cc: edgar.iglesias@xilinx.com, qemu-arm@nongnu.org, alex.bennee@linaro.org Subject: [Qemu-devel] [PATCH v1 3/3] target-arm: Implement the S2 MMU inputsize < pamax check X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: "Edgar E. Iglesias" Implement the inputsize < pamax check for Stage 2 translations. We have multiple choices for how to respond to errors and choose to fault. Signed-off-by: Edgar E. Iglesias --- target-arm/helper.c | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/target-arm/helper.c b/target-arm/helper.c index 4abeb4d..e1fa209 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -6808,7 +6808,7 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address, */ int startlevel = extract32(tcr->raw_tcr, 6, 2); unsigned int pamax = arm_pamax(cpu); - bool ok; + bool ok = true; if (va_size == 32 || stride == 9) { /* AArch32 or 4KB pages */ @@ -6818,9 +6818,16 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address, level = 3 - startlevel; } - /* Check that the starting level is valid. */ - ok = check_s2_startlevel(cpu, va_size == 64, level, - inputsize, stride, pamax); + if (inputsize > pamax && + (arm_el_is_aa64(env, 1) || inputsize > 40)) { + /* We have multiple choices but choose to fault. */ + ok = false; + } + if (ok) { + /* Check that the starting level is valid. */ + ok = check_s2_startlevel(cpu, va_size == 64, level, + inputsize, stride, pamax); + } if (!ok) { /* AArch64 reports these as level 0 faults. * AArch32 reports these as level 1 faults.