diff mbox

[v3,3/6] tcg/mips: Add use_mips32r6_instructions definition

Message ID 1443788657-14537-4-git-send-email-james.hogan@imgtec.com
State New
Headers show

Commit Message

James Hogan Oct. 2, 2015, 12:24 p.m. UTC
Add definition use_mips32r6_instructions to the MIPS TCG backend which
is constant 1 when built for MIPS release 6. This will be used to decide
between pre-R6 and R6 instruction encodings.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Cc: Aurelien Jarno <aurelien@aurel32.net>
---
 tcg/mips/tcg-target.h | 7 +++++++
 1 file changed, 7 insertions(+)

Comments

Aurelien Jarno Oct. 8, 2015, 4:12 p.m. UTC | #1
On 2015-10-02 13:24, James Hogan wrote:
> Add definition use_mips32r6_instructions to the MIPS TCG backend which
> is constant 1 when built for MIPS release 6. This will be used to decide
> between pre-R6 and R6 instruction encodings.
> 
> Signed-off-by: James Hogan <james.hogan@imgtec.com>
> Reviewed-by: Richard Henderson <rth@twiddle.net>
> Cc: Aurelien Jarno <aurelien@aurel32.net>
> ---
>  tcg/mips/tcg-target.h | 7 +++++++
>  1 file changed, 7 insertions(+)

Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>

> diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h
> index f5ba52cacfe5..e579c10b9aaa 100644
> --- a/tcg/mips/tcg-target.h
> +++ b/tcg/mips/tcg-target.h
> @@ -96,6 +96,13 @@ extern bool use_mips32_instructions;
>  extern bool use_mips32r2_instructions;
>  #endif
>  
> +/* MIPS32R6 instruction set detection */
> +#if defined(__mips_isa_rev) && (__mips_isa_rev >= 6)
> +#define use_mips32r6_instructions  1
> +#else
> +#define use_mips32r6_instructions  0
> +#endif
> +
>  /* optional instructions */
>  #define TCG_TARGET_HAS_div_i32          1
>  #define TCG_TARGET_HAS_rem_i32          1
> -- 
> 2.4.9
> 
>
diff mbox

Patch

diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h
index f5ba52cacfe5..e579c10b9aaa 100644
--- a/tcg/mips/tcg-target.h
+++ b/tcg/mips/tcg-target.h
@@ -96,6 +96,13 @@  extern bool use_mips32_instructions;
 extern bool use_mips32r2_instructions;
 #endif
 
+/* MIPS32R6 instruction set detection */
+#if defined(__mips_isa_rev) && (__mips_isa_rev >= 6)
+#define use_mips32r6_instructions  1
+#else
+#define use_mips32r6_instructions  0
+#endif
+
 /* optional instructions */
 #define TCG_TARGET_HAS_div_i32          1
 #define TCG_TARGET_HAS_rem_i32          1