From patchwork Fri Sep 18 11:25:27 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leon Alrae X-Patchwork-Id: 519256 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 193321401E7 for ; Fri, 18 Sep 2015 21:42:05 +1000 (AEST) Received: from localhost ([::1]:37257 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Zcu3G-000680-V1 for incoming@patchwork.ozlabs.org; Fri, 18 Sep 2015 07:42:02 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60235) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Zcu2t-0005YP-HX for qemu-devel@nongnu.org; Fri, 18 Sep 2015 07:41:40 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Zcu2q-0006S6-Cc for qemu-devel@nongnu.org; Fri, 18 Sep 2015 07:41:39 -0400 Received: from mailapp01.imgtec.com ([195.59.15.196]:35351) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Zcu2q-0006Rn-77 for qemu-devel@nongnu.org; Fri, 18 Sep 2015 07:41:36 -0400 Received: from KLMAIL01.kl.imgtec.org (unknown [192.168.5.35]) by Websense Email Security Gateway with ESMTPS id 49761675E32B9 for ; Fri, 18 Sep 2015 12:26:30 +0100 (IST) Received: from hhmail02.hh.imgtec.org (10.100.10.20) by KLMAIL01.kl.imgtec.org (192.168.5.35) with Microsoft SMTP Server (TLS) id 14.3.195.1; Fri, 18 Sep 2015 12:26:32 +0100 Received: from lalrae-linux.kl.imgtec.org (192.168.14.163) by hhmail02.hh.imgtec.org (10.100.10.20) with Microsoft SMTP Server (TLS) id 14.3.235.1; Fri, 18 Sep 2015 12:26:31 +0100 From: Leon Alrae To: Date: Fri, 18 Sep 2015 12:25:27 +0100 Message-ID: <1442575535-4735-3-git-send-email-leon.alrae@imgtec.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1442575535-4735-1-git-send-email-leon.alrae@imgtec.com> References: <1442575535-4735-1-git-send-email-leon.alrae@imgtec.com> MIME-Version: 1.0 X-Originating-IP: [192.168.14.163] X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 195.59.15.196 Cc: Petar Jovanovic Subject: [Qemu-devel] [PULL 02/10] target-mips: remove wrong checks for recip.fmt and rsqrt.fmt X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Petar Jovanovic Instructions recip.{s|d} and rsqrt.{s|d} do not require 64-bit FPU neither they require any particular mode for its FPU. This patch removes the checks that may break a program that uses these instructions. Signed-off-by: Petar Jovanovic Reviewed-by: Leon Alrae Signed-off-by: Leon Alrae --- target-mips/translate.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/target-mips/translate.c b/target-mips/translate.c index 2f1e724..fadef9e 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -9290,7 +9290,6 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1, opn = "movn.s"; break; case OPC_RECIP_S: - check_cop1x(ctx); { TCGv_i32 fp0 = tcg_temp_new_i32(); @@ -9302,7 +9301,6 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1, opn = "recip.s"; break; case OPC_RSQRT_S: - check_cop1x(ctx); { TCGv_i32 fp0 = tcg_temp_new_i32(); @@ -9835,7 +9833,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1, opn = "movn.d"; break; case OPC_RECIP_D: - check_cp1_64bitmode(ctx); + check_cp1_registers(ctx, fs | fd); { TCGv_i64 fp0 = tcg_temp_new_i64(); @@ -9847,7 +9845,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1, opn = "recip.d"; break; case OPC_RSQRT_D: - check_cp1_64bitmode(ctx); + check_cp1_registers(ctx, fs | fd); { TCGv_i64 fp0 = tcg_temp_new_i64();