From patchwork Fri Jun 26 10:25:06 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leon Alrae X-Patchwork-Id: 488706 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id E9FB31402AE for ; Fri, 26 Jun 2015 20:26:41 +1000 (AEST) Received: from localhost ([::1]:59227 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z8QqF-00086Q-PI for incoming@patchwork.ozlabs.org; Fri, 26 Jun 2015 06:26:39 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54741) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z8QpM-0006vF-6l for qemu-devel@nongnu.org; Fri, 26 Jun 2015 06:25:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Z8QpJ-000398-Ap for qemu-devel@nongnu.org; Fri, 26 Jun 2015 06:25:44 -0400 Received: from mailapp01.imgtec.com ([195.59.15.196]:11508) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z8QpJ-00038R-5a for qemu-devel@nongnu.org; Fri, 26 Jun 2015 06:25:41 -0400 Received: from KLMAIL01.kl.imgtec.org (unknown [192.168.5.35]) by Websense Email Security Gateway with ESMTPS id 3FA0383DDE941 for ; Fri, 26 Jun 2015 11:25:36 +0100 (IST) Received: from lalrae-linux.kl.imgtec.org (192.168.14.163) by KLMAIL01.kl.imgtec.org (192.168.5.35) with Microsoft SMTP Server (TLS) id 14.3.195.1; Fri, 26 Jun 2015 11:25:38 +0100 From: Leon Alrae To: Date: Fri, 26 Jun 2015 11:25:06 +0100 Message-ID: <1435314324-8755-3-git-send-email-leon.alrae@imgtec.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1435314324-8755-1-git-send-email-leon.alrae@imgtec.com> References: <1435314324-8755-1-git-send-email-leon.alrae@imgtec.com> MIME-Version: 1.0 X-Originating-IP: [192.168.14.163] X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 195.59.15.196 Cc: Matthew Fortune Subject: [Qemu-devel] [PULL 02/20] hw/mips: Do not clear BEV for MIPS malta kernel load X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Matthew Fortune The BEV flag controls whether the boot exception vector is still in place when starting a kernel. When cleared the exception vector at EBASE (or hard coded address of 0x80000000) is used instead. The early stages of the linux kernel would benefit from BEV still being set to ensure any faults get handled by the boot rom exception handlers. This is a moot point for system qemu as there aren't really any BEV handlers, but there are other good reasons to change this... The UHI (semi-hosting interface) defines special behaviours depending on whether an application starts in an environment with BEV set or cleared. When BEV is set then UHI assumes that a bootloader is relatively dumb and has no advanced exception handling logic. However, when BEV is cleared then UHI assumes that the bootloader has the ability to handle UHI exceptions with its exception handlers and will unwind and forward UHI SYSCALL exceptions to the exception vector that was installed prior to running the application. Signed-off-by: Matthew Fortune Signed-off-by: Leon Alrae --- hw/mips/mips_malta.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c index 786a8f0..a5d64d5 100644 --- a/hw/mips/mips_malta.c +++ b/hw/mips/mips_malta.c @@ -887,7 +887,7 @@ static void main_cpu_reset(void *opaque) read only location. The kernel location and the arguments table location does not change. */ if (loaderparams.kernel_filename) { - env->CP0_Status &= ~((1 << CP0St_BEV) | (1 << CP0St_ERL)); + env->CP0_Status &= ~(1 << CP0St_ERL); } malta_mips_config(cpu);