From patchwork Fri Jun 12 09:35:18 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Leon Alrae X-Patchwork-Id: 483436 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 958481402B4 for ; Fri, 12 Jun 2015 19:40:05 +1000 (AEST) Received: from localhost ([::1]:50218 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z3LRT-0002de-Qc for incoming@patchwork.ozlabs.org; Fri, 12 Jun 2015 05:40:03 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47635) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z3LO6-0005Jn-Ep for qemu-devel@nongnu.org; Fri, 12 Jun 2015 05:36:54 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Z3LNy-0006e3-95 for qemu-devel@nongnu.org; Fri, 12 Jun 2015 05:36:34 -0400 Received: from mailapp01.imgtec.com ([195.59.15.196]:57482) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z3LNx-0006d6-UI for qemu-devel@nongnu.org; Fri, 12 Jun 2015 05:36:26 -0400 Received: from KLMAIL01.kl.imgtec.org (unknown [192.168.5.35]) by Websense Email Security Gateway with ESMTPS id A164C3B0D45A8; Fri, 12 Jun 2015 10:36:22 +0100 (IST) Received: from lalrae-linux.kl.imgtec.org (192.168.14.163) by KLMAIL01.kl.imgtec.org (192.168.5.35) with Microsoft SMTP Server (TLS) id 14.3.195.1; Fri, 12 Jun 2015 10:36:24 +0100 From: Leon Alrae To: Date: Fri, 12 Jun 2015 10:35:18 +0100 Message-ID: <1434101736-11558-12-git-send-email-leon.alrae@imgtec.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1434101736-11558-1-git-send-email-leon.alrae@imgtec.com> References: <1434101736-11558-1-git-send-email-leon.alrae@imgtec.com> MIME-Version: 1.0 X-Originating-IP: [192.168.14.163] X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 195.59.15.196 Cc: =?UTF-8?q?Herv=C3=A9=20Poussineau?= Subject: [Qemu-devel] [PULL 11/29] dma/rc4030: do not use old_mmio accesses X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Hervé Poussineau Signed-off-by: Hervé Poussineau Reviewed-by: Aurelien Jarno Signed-off-by: Leon Alrae --- hw/dma/rc4030.c | 112 ++++++++------------------------------------------------ 1 file changed, 16 insertions(+), 96 deletions(-) diff --git a/hw/dma/rc4030.c b/hw/dma/rc4030.c index a0b617f..96f796b 100644 --- a/hw/dma/rc4030.c +++ b/hw/dma/rc4030.c @@ -125,7 +125,7 @@ static void set_next_tick(rc4030State *s) } /* called for accesses to rc4030 */ -static uint32_t rc4030_readl(void *opaque, hwaddr addr) +static uint64_t rc4030_read(void *opaque, hwaddr addr, unsigned int size) { rc4030State *s = opaque; uint32_t val; @@ -263,21 +263,6 @@ static uint32_t rc4030_readl(void *opaque, hwaddr addr) return val; } -static uint32_t rc4030_readw(void *opaque, hwaddr addr) -{ - uint32_t v = rc4030_readl(opaque, addr & ~0x3); - if (addr & 0x2) - return v >> 16; - else - return v & 0xffff; -} - -static uint32_t rc4030_readb(void *opaque, hwaddr addr) -{ - uint32_t v = rc4030_readl(opaque, addr & ~0x3); - return (v >> (8 * (addr & 0x3))) & 0xff; -} - static void rc4030_dma_as_update_one(rc4030State *s, int index, uint32_t frame) { if (index < MAX_TL_ENTRIES) { @@ -368,10 +353,11 @@ static void rc4030_dma_tt_update(rc4030State *s, uint32_t new_tl_base, } } - -static void rc4030_writel(void *opaque, hwaddr addr, uint32_t val) +static void rc4030_write(void *opaque, hwaddr addr, uint64_t data, + unsigned int size) { rc4030State *s = opaque; + uint32_t val = data; addr &= 0x3fff; DPRINTF("write 0x%02x at " TARGET_FMT_plx "\n", val, addr); @@ -494,43 +480,11 @@ static void rc4030_writel(void *opaque, hwaddr addr, uint32_t val) } } -static void rc4030_writew(void *opaque, hwaddr addr, uint32_t val) -{ - uint32_t old_val = rc4030_readl(opaque, addr & ~0x3); - - if (addr & 0x2) - val = (val << 16) | (old_val & 0x0000ffff); - else - val = val | (old_val & 0xffff0000); - rc4030_writel(opaque, addr & ~0x3, val); -} - -static void rc4030_writeb(void *opaque, hwaddr addr, uint32_t val) -{ - uint32_t old_val = rc4030_readl(opaque, addr & ~0x3); - - switch (addr & 3) { - case 0: - val = val | (old_val & 0xffffff00); - break; - case 1: - val = (val << 8) | (old_val & 0xffff00ff); - break; - case 2: - val = (val << 16) | (old_val & 0xff00ffff); - break; - case 3: - val = (val << 24) | (old_val & 0x00ffffff); - break; - } - rc4030_writel(opaque, addr & ~0x3, val); -} - static const MemoryRegionOps rc4030_ops = { - .old_mmio = { - .read = { rc4030_readb, rc4030_readw, rc4030_readl, }, - .write = { rc4030_writeb, rc4030_writew, rc4030_writel, }, - }, + .read = rc4030_read, + .write = rc4030_write, + .impl.min_access_size = 4, + .impl.max_access_size = 4, .endianness = DEVICE_NATIVE_ENDIAN, }; @@ -583,7 +537,7 @@ static void rc4030_periodic_timer(void *opaque) qemu_irq_raise(s->timer_irq); } -static uint32_t jazzio_readw(void *opaque, hwaddr addr) +static uint64_t jazzio_read(void *opaque, hwaddr addr, unsigned int size) { rc4030State *s = opaque; uint32_t val; @@ -621,24 +575,11 @@ static uint32_t jazzio_readw(void *opaque, hwaddr addr) return val; } -static uint32_t jazzio_readb(void *opaque, hwaddr addr) -{ - uint32_t v; - v = jazzio_readw(opaque, addr & ~0x1); - return (v >> (8 * (addr & 0x1))) & 0xff; -} - -static uint32_t jazzio_readl(void *opaque, hwaddr addr) -{ - uint32_t v; - v = jazzio_readw(opaque, addr); - v |= jazzio_readw(opaque, addr + 2) << 16; - return v; -} - -static void jazzio_writew(void *opaque, hwaddr addr, uint32_t val) +static void jazzio_write(void *opaque, hwaddr addr, uint64_t data, + unsigned int size) { rc4030State *s = opaque; + uint32_t val = data; addr &= 0xfff; DPRINTF("(jazz io controller) write 0x%04x at " TARGET_FMT_plx "\n", val, addr); @@ -655,32 +596,11 @@ static void jazzio_writew(void *opaque, hwaddr addr, uint32_t val) } } -static void jazzio_writeb(void *opaque, hwaddr addr, uint32_t val) -{ - uint32_t old_val = jazzio_readw(opaque, addr & ~0x1); - - switch (addr & 1) { - case 0: - val = val | (old_val & 0xff00); - break; - case 1: - val = (val << 8) | (old_val & 0x00ff); - break; - } - jazzio_writew(opaque, addr & ~0x1, val); -} - -static void jazzio_writel(void *opaque, hwaddr addr, uint32_t val) -{ - jazzio_writew(opaque, addr, val & 0xffff); - jazzio_writew(opaque, addr + 2, (val >> 16) & 0xffff); -} - static const MemoryRegionOps jazzio_ops = { - .old_mmio = { - .read = { jazzio_readb, jazzio_readw, jazzio_readl, }, - .write = { jazzio_writeb, jazzio_writew, jazzio_writel, }, - }, + .read = jazzio_read, + .write = jazzio_write, + .impl.min_access_size = 2, + .impl.max_access_size = 2, .endianness = DEVICE_NATIVE_ENDIAN, };