From patchwork Fri May 29 06:43:22 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Edgar E. Iglesias" X-Patchwork-Id: 477609 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 1A17E14012C for ; Fri, 29 May 2015 16:57:05 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=JRdOF8eG; dkim-atps=neutral Received: from localhost ([::1]:33955 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YyEE3-0006Cv-BA for incoming@patchwork.ozlabs.org; Fri, 29 May 2015 02:57:03 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59177) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YyEB0-00015l-DZ for qemu-devel@nongnu.org; Fri, 29 May 2015 02:53:55 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YyEAx-0006W8-6r for qemu-devel@nongnu.org; Fri, 29 May 2015 02:53:54 -0400 Received: from mail-pa0-x22a.google.com ([2607:f8b0:400e:c03::22a]:35246) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YyEAw-0006Tu-MF for qemu-devel@nongnu.org; Fri, 29 May 2015 02:53:50 -0400 Received: by pacwv17 with SMTP id wv17so46130637pac.2 for ; Thu, 28 May 2015 23:53:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=F29mGO7NiJcC4V8W2s7rpmfwAMyMWdRk7v5Tue47UpA=; b=JRdOF8eGQIH8wq/9psQ4FD2SN30oZlTc07eWwKXoPyCEt94k4R+JNd9zzCoVlKE2mQ vBGqwN4NnvjsCJFDjbKXDVwwhv/s8vsZ7trBMFLDd5mCBtYy07UuCqRcuzbjy7BtQgdw D9ndwqo8qTquDGyNh9omBenaJPihDJCRFXubECSqvVeVeCU6kR+lu0nMwk2Opm0c5oQH zu4C8LOWDmGn1liIMOJT14UnlhQuFgAItg0byjfLGTY/20PhfENsY6V3qXejJi0i0G9I iBwJTXa7ZAoyvSfFjPeRkKtsYHAkmf/HfT8z8IU7VazD9K+JVVhhz18mFOlev9Eko3Hz 79ew== X-Received: by 10.66.55.41 with SMTP id o9mr12408191pap.148.1432882429823; Thu, 28 May 2015 23:53:49 -0700 (PDT) Received: from localhost ([203.126.243.116]) by mx.google.com with ESMTPSA id im6sm4416841pbc.72.2015.05.28.23.53.48 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Thu, 28 May 2015 23:53:49 -0700 (PDT) From: "Edgar E. Iglesias" To: qemu-devel@nongnu.org, peter.maydell@linaro.org Date: Fri, 29 May 2015 16:43:22 +1000 Message-Id: <1432881807-18164-11-git-send-email-edgar.iglesias@gmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1432881807-18164-1-git-send-email-edgar.iglesias@gmail.com> References: <1432881807-18164-1-git-send-email-edgar.iglesias@gmail.com> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:400e:c03::22a Cc: edgar.iglesias@xilinx.com, serge.fdrv@gmail.com, alex.bennee@linaro.org, agraf@suse.de Subject: [Qemu-devel] [PATCH v3 10/15] target-arm: Add TLBI_VAE2{IS} X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: "Edgar E. Iglesias" Signed-off-by: Edgar E. Iglesias --- target-arm/helper.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/target-arm/helper.c b/target-arm/helper.c index bf198e9..a5c0363 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -2651,6 +2651,14 @@ static const ARMCPRegInfo v8_el2_cp_reginfo[] = { .opc0 = 1, .opc1 = 4, .crn = 8, .crm = 7, .opc2 = 0, .type = ARM_CP_NO_RAW, .access = PL2_W, .writefn = tlbiall_write }, + { .name = "TLBI_VAE2", .state = ARM_CP_STATE_AA64, + .opc0 = 1, .opc1 = 4, .crn = 8, .crm = 7, .opc2 = 1, + .type = ARM_CP_NO_RAW, .access = PL2_W, + .writefn = tlbi_aa64_vaa_write }, + { .name = "TLBI_VAE2IS", .state = ARM_CP_STATE_AA64, + .opc0 = 1, .opc1 = 4, .crn = 8, .crm = 3, .opc2 = 1, + .type = ARM_CP_NO_RAW, .access = PL2_W, + .writefn = tlbi_aa64_vaa_write }, REGINFO_SENTINEL };