From patchwork Wed May 27 07:27:32 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Edgar E. Iglesias" X-Patchwork-Id: 476973 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 578EA14016A for ; Wed, 27 May 2015 17:36:56 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=b3fxALFq; dkim-atps=neutral Received: from localhost ([::1]:52281 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YxVtW-00061j-HS for incoming@patchwork.ozlabs.org; Wed, 27 May 2015 03:36:54 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46826) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YxVsz-0005EF-Tf for qemu-devel@nongnu.org; Wed, 27 May 2015 03:36:22 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YxVsu-0006wH-Hs for qemu-devel@nongnu.org; Wed, 27 May 2015 03:36:21 -0400 Received: from mail-pd0-x230.google.com ([2607:f8b0:400e:c02::230]:34681) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YxVsu-0006vj-9R for qemu-devel@nongnu.org; Wed, 27 May 2015 03:36:16 -0400 Received: by pdbki1 with SMTP id ki1so3127525pdb.1 for ; Wed, 27 May 2015 00:36:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=+KQBiEM9dA2+8pncvI9QhL35OO/71xZ03VGNYdS6IxU=; b=b3fxALFqkFrkwW/v76Xb90KTRZ2zLXu5HT4FAfO5XEy60gS43K2o2C5f2EQwVWE0jO lZcm1iSdjdwT2euGJMm9ryHQ9mY77sourh5/+D+GoDBrHWSY1Hg5iXUv5swWdRyJoHYb AK/xv32pvAYwneaH9Ar68ZntE/w8cpGWOvnKj1foZolDTa/biBtxnel0xhxXyVRTz9g5 y7C5iOBzhz0Kb9+PGCgUGERFRyDmIG4haWdzCR05mQuzc/ig+rXI3Uuxc2zWjO/KqpQr pinGCpZtCjs72M7Ukk8wAtLDMiE1aVTye1B135gjonoJaWelxccd0vTCl/JbJ5bBhAgb Zjnw== X-Received: by 10.66.129.140 with SMTP id nw12mr15696592pab.68.1432712175366; Wed, 27 May 2015 00:36:15 -0700 (PDT) Received: from localhost ([203.126.243.116]) by mx.google.com with ESMTPSA id og11sm15225757pdb.91.2015.05.27.00.36.14 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Wed, 27 May 2015 00:36:14 -0700 (PDT) From: "Edgar E. Iglesias" To: qemu-devel@nongnu.org, peter.maydell@linaro.org Date: Wed, 27 May 2015 17:27:32 +1000 Message-Id: <1432711659-24591-8-git-send-email-edgar.iglesias@gmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1432711659-24591-1-git-send-email-edgar.iglesias@gmail.com> References: <1432711659-24591-1-git-send-email-edgar.iglesias@gmail.com> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:400e:c02::230 Cc: edgar.iglesias@xilinx.com, serge.fdrv@gmail.com, alex.bennee@linaro.org, agraf@suse.de, greg.bellows@linaro.org Subject: [Qemu-devel] [PATCH v2 07/14] target-arm: Add TLBI_ALLE1{IS} X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: "Edgar E. Iglesias" Signed-off-by: Edgar E. Iglesias --- target-arm/helper.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/target-arm/helper.c b/target-arm/helper.c index 193750b..826df50 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -2368,6 +2368,14 @@ static const ARMCPRegInfo v8_cp_reginfo[] = { .opc0 = 1, .opc1 = 0, .crn = 7, .crm = 14, .opc2 = 2, .access = PL1_W, .type = ARM_CP_NOP }, /* TLBI operations */ + { .name = "TLBI_ALLE1", .state = ARM_CP_STATE_AA64, + .opc0 = 1, .opc1 = 4, .crn = 8, .crm = 7, .opc2 = 4, + .access = PL2_W, .type = ARM_CP_NO_RAW, + .writefn = tlbiall_write }, + { .name = "TLBI_ALLE1IS", .state = ARM_CP_STATE_AA64, + .opc0 = 1, .opc1 = 4, .crn = 8, .crm = 3, .opc2 = 4, + .access = PL2_W, .type = ARM_CP_NO_RAW, + .writefn = tlbiall_write }, { .name = "TLBI_VMALLE1IS", .state = ARM_CP_STATE_AA64, .opc0 = 1, .opc1 = 0, .crn = 8, .crm = 3, .opc2 = 0, .access = PL1_W, .type = ARM_CP_NO_RAW,