From patchwork Wed May 13 06:52:33 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Edgar E. Iglesias" X-Patchwork-Id: 471710 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3D77E140D16 for ; Wed, 13 May 2015 17:02:10 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=w57Blm5w; dkim-atps=neutral Received: from localhost ([::1]:46701 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YsQgC-0006kP-FD for incoming@patchwork.ozlabs.org; Wed, 13 May 2015 03:02:08 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39561) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YsQfT-0005Ib-Kl for qemu-devel@nongnu.org; Wed, 13 May 2015 03:01:24 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YsQfO-0001sM-Ji for qemu-devel@nongnu.org; Wed, 13 May 2015 03:01:23 -0400 Received: from mail-ob0-x22d.google.com ([2607:f8b0:4003:c01::22d]:36061) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YsQfO-0001sE-9b for qemu-devel@nongnu.org; Wed, 13 May 2015 03:01:18 -0400 Received: by obbkp3 with SMTP id kp3so23053974obb.3 for ; Wed, 13 May 2015 00:01:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=/gJiPIyp6/3pBrticwu5Abd95zdrskJcd8OSx9n8em4=; b=w57Blm5wyTojitcSbmkVhq++wFl5lTNpjx0hZD3q6qtPC6Bp6QbTCopwGuDHLywUMZ O9lPGf7r8RDqqZMWax0tilJ78zE3DKtxtdqFj9+i+DCnPRFiYYnH6Mqc3apAjKPewFQs NNCNRout1WIKmNPOXAY46vMbFAkgwDnhMp5McLd+kN/t19TH1A6GANDw5mh31qD/PG/l RolCfAI/YkVOMIM1RPjZvpyC03oten0zQgxEfG29Hg1MibQTEg5QTzCPrqPlN2oqdRX8 2BalcxQrJ6C334eueQAPUOWahFhxGubA9NuCNxDYnLxfO6eLUIu+S+4LidjZg4nXgJlH jTQQ== X-Received: by 10.182.66.68 with SMTP id d4mr14801481obt.74.1431500477847; Wed, 13 May 2015 00:01:17 -0700 (PDT) Received: from localhost ([203.126.243.116]) by mx.google.com with ESMTPSA id pn16sm12294259oeb.16.2015.05.13.00.01.16 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Wed, 13 May 2015 00:01:17 -0700 (PDT) From: "Edgar E. Iglesias" To: qemu-devel@nongnu.org, peter.maydell@linaro.org Date: Wed, 13 May 2015 16:52:33 +1000 Message-Id: <1431499963-1019-9-git-send-email-edgar.iglesias@gmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1431499963-1019-1-git-send-email-edgar.iglesias@gmail.com> References: <1431499963-1019-1-git-send-email-edgar.iglesias@gmail.com> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:4003:c01::22d Cc: edgar.iglesias@xilinx.com, serge.fdrv@gmail.com, alex.bennee@linaro.org, agraf@suse.de, greg.bellows@linaro.org Subject: [Qemu-devel] [PATCH v1 08/18] target-arm: Add TTBR0_EL2 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: "Edgar E. Iglesias" Signed-off-by: Edgar E. Iglesias --- target-arm/helper.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/target-arm/helper.c b/target-arm/helper.c index c44cbb4..ace933c 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -2532,6 +2532,10 @@ static const ARMCPRegInfo v8_el3_no_el2_cp_reginfo[] = { .opc0 = 3, .opc1 = 4, .crn = 1, .crm = 0, .opc2 = 0, .access = PL2_RW, .readfn = arm_cp_read_zero, .writefn = arm_cp_write_ignore }, + { .name = "TTBR0_EL2", .state = ARM_CP_STATE_AA64, + .opc0 = 3, .opc1 = 4, .crn = 2, .crm = 0, .opc2 = 0, + .access = PL2_RW, + .readfn = arm_cp_read_zero, .writefn = arm_cp_write_ignore }, REGINFO_SENTINEL }; @@ -2620,6 +2624,10 @@ static const ARMCPRegInfo v8_el2_cp_reginfo[] = { .opc0 = 3, .opc1 = 4, .crn = 1, .crm = 0, .opc2 = 0, .access = PL2_RW, .raw_writefn = raw_write, .writefn = sctlr_write, .fieldoffset = offsetof(CPUARMState, cp15.sctlr_el[2]) }, + { .name = "TTBR0_EL2", .state = ARM_CP_STATE_AA64, + .opc0 = 3, .opc1 = 4, .crn = 2, .crm = 0, .opc2 = 0, + .access = PL2_RW, .writefn = vmsa_ttbr_write, .resetvalue = 0, + .fieldoffset = offsetof(CPUARMState, cp15.ttbr0_el[2]) }, REGINFO_SENTINEL };