From patchwork Wed May 13 06:52:36 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Edgar E. Iglesias" X-Patchwork-Id: 471714 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id EE765140D16 for ; Wed, 13 May 2015 17:04:23 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=k29B2i4+; dkim-atps=neutral Received: from localhost ([::1]:46719 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YsQiL-0001dj-T5 for incoming@patchwork.ozlabs.org; Wed, 13 May 2015 03:04:21 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40134) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YsQhE-00008L-6K for qemu-devel@nongnu.org; Wed, 13 May 2015 03:03:13 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YsQh9-0002rh-14 for qemu-devel@nongnu.org; Wed, 13 May 2015 03:03:12 -0400 Received: from mail-qc0-x236.google.com ([2607:f8b0:400d:c01::236]:34160) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YsQh8-0002rX-Sp for qemu-devel@nongnu.org; Wed, 13 May 2015 03:03:06 -0400 Received: by qcyk17 with SMTP id k17so17822676qcy.1 for ; Wed, 13 May 2015 00:03:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=OSUkFK64kmk2zWVolI5txN6tQftoY2t7TWWeWnTt6kU=; b=k29B2i4+qORNONWNALWSRwvzmXsKIgdqWY/FAC9g3LTK7uOdcmNHHIbPMKOLkNv03M tzsDSU4vHqeFmGMCapwiqNZ6JxFsZvybNaLgtOEJ/6rDPK4csqG9dUCHYT/sdMD7KmAK pIOTX9YL0kW7LSZCPoh+5dhkN5/qM3yICJFJQKUXsch4ZvRFjEeWo/2dsBilrnPCKf4m mf7cD7SQCkPKHb8evLt3A80pdtGnBhIssBFbXg7I8I7doc1dKndjt9IKaNO1lAW4Teu6 qQD8Yf19wq8bvr71W66HoFGrfFpZ+63bh+Ew1eL1ggGP6A33JbJT1tSvIzWHd06ejwjm FMNA== X-Received: by 10.229.172.70 with SMTP id k6mr25929455qcz.10.1431500586556; Wed, 13 May 2015 00:03:06 -0700 (PDT) Received: from localhost ([203.126.243.116]) by mx.google.com with ESMTPSA id i137sm14984244qhc.49.2015.05.13.00.03.05 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Wed, 13 May 2015 00:03:06 -0700 (PDT) From: "Edgar E. Iglesias" To: qemu-devel@nongnu.org, peter.maydell@linaro.org Date: Wed, 13 May 2015 16:52:36 +1000 Message-Id: <1431499963-1019-12-git-send-email-edgar.iglesias@gmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1431499963-1019-1-git-send-email-edgar.iglesias@gmail.com> References: <1431499963-1019-1-git-send-email-edgar.iglesias@gmail.com> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:400d:c01::236 Cc: edgar.iglesias@xilinx.com, serge.fdrv@gmail.com, alex.bennee@linaro.org, agraf@suse.de, greg.bellows@linaro.org Subject: [Qemu-devel] [PATCH v1 11/18] target-arm: Add TPIDR_EL2 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: "Edgar E. Iglesias" Signed-off-by: Edgar E. Iglesias --- target-arm/helper.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/target-arm/helper.c b/target-arm/helper.c index 8e96b14..d57e0af 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -2544,6 +2544,10 @@ static const ARMCPRegInfo v8_el3_no_el2_cp_reginfo[] = { .opc0 = 3, .opc1 = 4, .crn = 2, .crm = 0, .opc2 = 0, .access = PL2_RW, .readfn = arm_cp_read_zero, .writefn = arm_cp_write_ignore }, + { .name = "TPIDR_EL2", .state = ARM_CP_STATE_AA64, + .opc0 = 3, .opc1 = 4, .opc2 = 2, .crn = 13, .crm = 0, + .access = PL2_RW, + .readfn = arm_cp_read_zero, .writefn = arm_cp_write_ignore }, REGINFO_SENTINEL }; @@ -2640,6 +2644,10 @@ static const ARMCPRegInfo v8_el2_cp_reginfo[] = { .opc0 = 1, .opc1 = 4, .crn = 8, .crm = 7, .opc2 = 0, .type = ARM_CP_NO_RAW, .access = PL2_W, .writefn = tlbiall_write }, + { .name = "TPIDR_EL2", .state = ARM_CP_STATE_AA64, + .opc0 = 3, .opc1 = 4, .opc2 = 2, .crn = 13, .crm = 0, + .access = PL2_RW, .resetvalue = 0, + .fieldoffset = offsetof(CPUARMState, cp15.tpidr_el[2]) }, REGINFO_SENTINEL };