From patchwork Wed May 13 06:52:34 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Edgar E. Iglesias" X-Patchwork-Id: 471711 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id E1F6D140D16 for ; Wed, 13 May 2015 17:02:38 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=Bx+VY5LJ; dkim-atps=neutral Received: from localhost ([::1]:46706 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YsQgf-0007fi-57 for incoming@patchwork.ozlabs.org; Wed, 13 May 2015 03:02:37 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39815) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YsQg4-0006Y7-SZ for qemu-devel@nongnu.org; Wed, 13 May 2015 03:02:04 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YsQfz-00025f-Qx for qemu-devel@nongnu.org; Wed, 13 May 2015 03:02:00 -0400 Received: from mail-qc0-x235.google.com ([2607:f8b0:400d:c01::235]:34121) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YsQfz-00025V-LL for qemu-devel@nongnu.org; Wed, 13 May 2015 03:01:55 -0400 Received: by qcyk17 with SMTP id k17so17811472qcy.1 for ; Wed, 13 May 2015 00:01:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=3j3FoZcmjb+Uy81Y7411S61WOIZCIDZYmAz08oVGKi8=; b=Bx+VY5LJFgslb1RO0CjIGcjx3gd3XpqrOZVKa9o2Phw5f0O7dvCHBNmfk96ooobSPB x3MXQXJ8O7WCZDiVcZQuBMIx9+cStNHRPDsF5oiFQJSTpLQEWKG2XrCzCayjmmx/cYRz 8V41hT257UA5qry6/3rs9efWL1kxK0hT9BLmooDPRloPWtbsR8DWd7OUqaqTlYFW/4oP N/Ze6fmpb3mL55s0ESJBPfpRgQnBZQ6mif53WDrRLAYsV5tyhzT6WPmb5MTZAR4+S3ff wP+c1QLfwH9zwK252+o/BXqk4YTjSw/65VQoGt1tSK/WZT2/lFlzrJcXSB375Hb9FKsg VPhw== X-Received: by 10.140.235.77 with SMTP id g74mr26126025qhc.64.1431500515211; Wed, 13 May 2015 00:01:55 -0700 (PDT) Received: from localhost ([203.126.243.116]) by mx.google.com with ESMTPSA id 104sm15142112qgj.43.2015.05.13.00.01.53 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Wed, 13 May 2015 00:01:54 -0700 (PDT) From: "Edgar E. Iglesias" To: qemu-devel@nongnu.org, peter.maydell@linaro.org Date: Wed, 13 May 2015 16:52:34 +1000 Message-Id: <1431499963-1019-10-git-send-email-edgar.iglesias@gmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1431499963-1019-1-git-send-email-edgar.iglesias@gmail.com> References: <1431499963-1019-1-git-send-email-edgar.iglesias@gmail.com> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:400d:c01::235 Cc: edgar.iglesias@xilinx.com, serge.fdrv@gmail.com, alex.bennee@linaro.org, agraf@suse.de, greg.bellows@linaro.org Subject: [Qemu-devel] [PATCH v1 09/18] target-arm: Add TLBI_ALLE1{IS} X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: "Edgar E. Iglesias" Signed-off-by: Edgar E. Iglesias --- target-arm/helper.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/target-arm/helper.c b/target-arm/helper.c index ace933c..830c9d4 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -2366,6 +2366,14 @@ static const ARMCPRegInfo v8_cp_reginfo[] = { .opc0 = 1, .opc1 = 0, .crn = 7, .crm = 14, .opc2 = 2, .access = PL1_W, .type = ARM_CP_NOP }, /* TLBI operations */ + { .name = "TLBI_ALLE1", .state = ARM_CP_STATE_AA64, + .opc0 = 1, .opc1 = 4, .crn = 8, .crm = 7, .opc2 = 4, + .access = PL2_W, .type = ARM_CP_NO_RAW, + .writefn = tlbiall_write }, + { .name = "TLBI_ALLE1IS", .state = ARM_CP_STATE_AA64, + .opc0 = 1, .opc1 = 4, .crn = 8, .crm = 3, .opc2 = 4, + .access = PL2_W, .type = ARM_CP_NO_RAW, + .writefn = tlbiall_write }, { .name = "TLBI_VMALLE1IS", .state = ARM_CP_STATE_AA64, .opc0 = 1, .opc1 = 0, .crn = 8, .crm = 3, .opc2 = 0, .access = PL1_W, .type = ARM_CP_NO_RAW,