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[PULL,5/7] target-mips: fix for missing delay slot in BC1EQZ and BC1NEZ

Message ID 1415379369-16877-6-git-send-email-leon.alrae@imgtec.com
State New
Headers show

Commit Message

Leon Alrae Nov. 7, 2014, 4:56 p.m. UTC 
New R6 COP1 conditional branches currently don't have delay slot. Fixing this
by setting MIPS_HFLAG_BDS32 flag which is required for branches having 4-byte
delay slot.

Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Reviewed-by: Yongbok Kim <yongbok.kim@imgtec.com>
---
 target-mips/translate.c | 1 +
 1 file changed, 1 insertion(+)
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Patch

diff --git a/target-mips/translate.c b/target-mips/translate.c
index d6722e1..194d4fb 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -8104,6 +8104,7 @@  static void gen_compute_branch1_r6(DisasContext *ctx, uint32_t op,
     MIPS_DEBUG("%s: cond %02x target " TARGET_FMT_lx, opn,
                ctx->hflags, btarget);
     ctx->btarget = btarget;
+    ctx->hflags |= MIPS_HFLAG_BDS32;
 
 out:
     tcg_temp_free_i64(t0);