From patchwork Tue Aug 5 08:49:58 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Edgar E. Iglesias" X-Patchwork-Id: 376623 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id B62AF14009B for ; Tue, 5 Aug 2014 18:56:24 +1000 (EST) Received: from localhost ([::1]:57813 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XEaXe-0008WA-PB for incoming@patchwork.ozlabs.org; Tue, 05 Aug 2014 04:56:22 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35444) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XEaX1-0007sT-TJ for qemu-devel@nongnu.org; Tue, 05 Aug 2014 04:55:49 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XEaWx-0005RX-3H for qemu-devel@nongnu.org; Tue, 05 Aug 2014 04:55:43 -0400 Received: from mail-qg0-x22a.google.com ([2607:f8b0:400d:c04::22a]:45899) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XEaWw-0005RR-RL for qemu-devel@nongnu.org; Tue, 05 Aug 2014 04:55:38 -0400 Received: by mail-qg0-f42.google.com with SMTP id j5so650733qga.15 for ; Tue, 05 Aug 2014 01:55:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=H8OGeAu/klPuysvPFUVKkPT45lJtox666GCskdKuQO0=; b=T2x/f+6vTqdyIeGOICX03CpUnKX0hFFP79yG/+wcAo/FUhuApP6pUR0mqkNt1xvPDm a2osPMrDjbvgtfceOslDp9Xqx+vF5nb6bGYDd9Tv6UyrnYy9UsIv0lSfTOQZKWaliQ0H p9XuyLFPGI/Hepva5bEEfhIYwRXnLTR1i9QC2T1b1dcZxXL3h4HmGevyBgLVMSowptw0 cRD0/TsF4BuVBg/oldKcaBXpYTtfRyI2vLULkzxaJe/2RG7JcAyDOwVFnQZvwRytjF8X MUzW3jOTyVlP/HzBpImj3WX9gxZAhSVKhDJshbHMl/CyKCSL3yFBsDQTad+rV/mKFSaF QQSw== X-Received: by 10.229.82.74 with SMTP id a10mr3232035qcl.21.1407228938363; Tue, 05 Aug 2014 01:55:38 -0700 (PDT) Received: from localhost ([203.126.243.116]) by mx.google.com with ESMTPSA id p12sm1272488qga.0.2014.08.05.01.55.31 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Tue, 05 Aug 2014 01:55:37 -0700 (PDT) From: "Edgar E. Iglesias" To: qemu-devel@nongnu.org, peter.maydell@linaro.org Date: Tue, 5 Aug 2014 18:49:58 +1000 Message-Id: <1407228605-27081-5-git-send-email-edgar.iglesias@gmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1407228605-27081-1-git-send-email-edgar.iglesias@gmail.com> References: <1407228605-27081-1-git-send-email-edgar.iglesias@gmail.com> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:400d:c04::22a Cc: rob.herring@linaro.org, peter.crosthwaite@xilinx.com, aggelerf@ethz.ch, agraf@suse.de, blauwirbel@gmail.com, greg.bellows@linaro.org, pbonzini@redhat.com, alex.bennee@linaro.org, christoffer.dall@linaro.org, rth@twiddle.net Subject: [Qemu-devel] [PATCH v4 04/10] target-arm: Break out exception masking to a separate func X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: "Edgar E. Iglesias" Reviewed-by: Greg Bellows Signed-off-by: Edgar E. Iglesias --- cpu-exec.c | 5 ++--- target-arm/cpu.h | 15 +++++++++++++++ 2 files changed, 17 insertions(+), 3 deletions(-) diff --git a/cpu-exec.c b/cpu-exec.c index 38e5f02..a579ffc 100644 --- a/cpu-exec.c +++ b/cpu-exec.c @@ -478,7 +478,7 @@ int cpu_exec(CPUArchState *env) } #elif defined(TARGET_ARM) if (interrupt_request & CPU_INTERRUPT_FIQ - && !(env->daif & PSTATE_F)) { + && arm_excp_unmasked(cpu, EXCP_FIQ)) { cpu->exception_index = EXCP_FIQ; cc->do_interrupt(cpu); next_tb = 0; @@ -493,8 +493,7 @@ int cpu_exec(CPUArchState *env) We avoid this by disabling interrupts when pc contains a magic address. */ if (interrupt_request & CPU_INTERRUPT_HARD - && ((IS_M(env) && env->regs[15] < 0xfffffff0) - || !(env->daif & PSTATE_I))) { + && arm_excp_unmasked(cpu, EXCP_IRQ)) { cpu->exception_index = EXCP_IRQ; cc->do_interrupt(cpu); next_tb = 0; diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 2fff2e7..63fdcbf 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -1145,6 +1145,21 @@ bool write_cpustate_to_list(ARMCPU *cpu); # define TARGET_VIRT_ADDR_SPACE_BITS 32 #endif +static inline bool arm_excp_unmasked(CPUState *cs, unsigned int excp_idx) +{ + CPUARMState *env = cs->env_ptr; + + switch (excp_idx) { + case EXCP_FIQ: + return !(env->daif & PSTATE_F); + case EXCP_IRQ: + return ((IS_M(env) && env->regs[15] < 0xfffffff0) + || !(env->daif & PSTATE_I)); + default: + g_assert_not_reached(); + } +} + static inline CPUARMState *cpu_init(const char *cpu_model) { ARMCPU *cpu = cpu_arm_init(cpu_model);