From patchwork Tue Jun 17 08:45:33 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Edgar E. Iglesias" X-Patchwork-Id: 360382 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 00B9E140084 for ; Tue, 17 Jun 2014 18:49:09 +1000 (EST) Received: from localhost ([::1]:48156 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Wwp4k-0004l5-Nx for incoming@patchwork.ozlabs.org; Tue, 17 Jun 2014 04:49:06 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35844) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Wwp4G-0004fN-MU for qemu-devel@nongnu.org; Tue, 17 Jun 2014 04:48:41 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Wwp4B-0003el-UW for qemu-devel@nongnu.org; Tue, 17 Jun 2014 04:48:36 -0400 Received: from mail-pd0-x231.google.com ([2607:f8b0:400e:c02::231]:52425) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Wwp4B-0003ea-Oy for qemu-devel@nongnu.org; Tue, 17 Jun 2014 04:48:31 -0400 Received: by mail-pd0-f177.google.com with SMTP id y10so3893600pdj.36 for ; Tue, 17 Jun 2014 01:48:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-type:content-transfer-encoding; bh=3P5E1bjQY4r/WspkOCRcuwsiFRrhb+9QZ45Vtp+h9+8=; b=UzhFMVDMQfn9gyR3II3+DqS2QHr0R6RZwVZoZQbQnWWDwvjaM+foUakh0nz7dwqA/i XzQLSEfFpzT/4MtgfRFa3Vn+hXeX6SoISfNbBHKZfJsxauZkkDrVcaOs0E0RIH37r911 mRjn/nd0+QfgcvDSBinX31CuFJtf/BDztfq1f29Sc/+Yn27n6hh6Oi0KaACOHwS9qZBr cGtCfZIkhKFJ6QOoqA676Fi6ZKITTeYwmJ0s7L294cpVOUvkqFfef0sk0lQHSghi4Wi0 ebB606q8nQtCC9tSJRXC9eOvkrqJNNIvoNgBYSuwuoDamBDLfr7JpCCIlewJ3Y/1Xo9u GyiA== X-Received: by 10.68.133.229 with SMTP id pf5mr31536863pbb.115.1402994910884; Tue, 17 Jun 2014 01:48:30 -0700 (PDT) Received: from localhost ([203.126.243.116]) by mx.google.com with ESMTPSA id dd5sm22803126pbc.85.2014.06.17.01.48.24 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Tue, 17 Jun 2014 01:48:30 -0700 (PDT) From: "Edgar E. Iglesias" To: qemu-devel@nongnu.org, peter.maydell@linaro.org Date: Tue, 17 Jun 2014 18:45:33 +1000 Message-Id: <1402994746-8328-4-git-send-email-edgar.iglesias@gmail.com> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1402994746-8328-1-git-send-email-edgar.iglesias@gmail.com> References: <1402994746-8328-1-git-send-email-edgar.iglesias@gmail.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:400e:c02::231 Cc: rob.herring@linaro.org, peter.crosthwaite@xilinx.com, aggelerf@ethz.ch, agraf@suse.de, blauwirbel@gmail.com, john.williams@xilinx.com, greg.bellows@linaro.org, pbonzini@redhat.com, alex.bennee@linaro.org, christoffer.dall@linaro.org, rth@twiddle.net Subject: [Qemu-devel] [PATCH v3 03/16] target-arm: A64: Respect SPSEL when taking exceptions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: "Edgar E. Iglesias" Reviewed-by: Alex Bennée Signed-off-by: Edgar E. Iglesias --- target-arm/helper-a64.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target-arm/helper-a64.c b/target-arm/helper-a64.c index 2b4ce6a..027434a 100644 --- a/target-arm/helper-a64.c +++ b/target-arm/helper-a64.c @@ -489,8 +489,7 @@ void aarch64_cpu_do_interrupt(CPUState *cs) if (is_a64(env)) { env->banked_spsr[aarch64_banked_spsr_index(1)] = pstate_read(env); - env->sp_el[arm_current_pl(env)] = env->xregs[31]; - env->xregs[31] = env->sp_el[1]; + aarch64_save_sp(env, arm_current_pl(env)); env->elr_el[1] = env->pc; } else { env->banked_spsr[0] = cpsr_read(env); @@ -508,6 +507,7 @@ void aarch64_cpu_do_interrupt(CPUState *cs) pstate_write(env, PSTATE_DAIF | PSTATE_MODE_EL1h); env->aarch64 = 1; + aarch64_restore_sp(env, 1); env->pc = addr; cs->interrupt_request |= CPU_INTERRUPT_EXITTB;