From patchwork Mon Jun 9 15:04:28 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Edgar E. Iglesias" X-Patchwork-Id: 357535 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 85773140092 for ; Tue, 10 Jun 2014 01:21:12 +1000 (EST) Received: from localhost ([::1]:33885 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Wu1Nm-0005CY-5k for incoming@patchwork.ozlabs.org; Mon, 09 Jun 2014 11:21:10 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33355) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Wu1JH-00079x-BB for qemu-devel@nongnu.org; Mon, 09 Jun 2014 11:16:37 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Wu1JB-0004HE-DF for qemu-devel@nongnu.org; Mon, 09 Jun 2014 11:16:31 -0400 Received: from mail-pd0-x230.google.com ([2607:f8b0:400e:c02::230]:58832) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Wu1JA-0004Gx-UH for qemu-devel@nongnu.org; Mon, 09 Jun 2014 11:16:25 -0400 Received: by mail-pd0-f176.google.com with SMTP id p10so4903392pdj.35 for ; Mon, 09 Jun 2014 08:16:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=GF42b8UGMSeMA5v6PRfohiyAQqxzIdl2D/dT3OwumKg=; b=xaHMqWXtA7uS6pXwb2pZcqrcye/GQx8vCmJPxX5CggFlOuPkqM2qa3YZWTKWhnhY4V iTuHgmt4XbbblfB3FdeAEAVLj/iZ2uMC33xE+KAnKERR3/DdVGnXPIJdN9e7mY47yZtV gx3Aferff/C4qapguPzKT2+8PjiLL+mPG4OPwUgBBQbOVwV2ID/+6/U2SgEePiFQV+f8 g4gwYLbYk68fD78/cGNURJTHYe3jQSGOSMa2jq+NIC5PBJGdjX4EQOmpCCvfid+HNAv+ jJnBqZh7G7ScWoB9QLqDH9cNGFDX2Fyj+7gk5K06FnQm501qfUgX0hc4TLTB/rteI4Oc Liug== X-Received: by 10.66.244.176 with SMTP id xh16mr5463653pac.20.1402326983774; Mon, 09 Jun 2014 08:16:23 -0700 (PDT) Received: from localhost ([203.126.243.116]) by mx.google.com with ESMTPSA id wk4sm13800061pab.5.2014.06.09.08.16.17 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Mon, 09 Jun 2014 08:16:23 -0700 (PDT) From: "Edgar E. Iglesias" To: qemu-devel@nongnu.org, peter.maydell@linaro.org Date: Tue, 10 Jun 2014 01:04:28 +1000 Message-Id: <1402326269-8573-17-git-send-email-edgar.iglesias@gmail.com> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1402326269-8573-1-git-send-email-edgar.iglesias@gmail.com> References: <1402326269-8573-1-git-send-email-edgar.iglesias@gmail.com> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:400e:c02::230 Cc: rob.herring@linaro.org, peter.crosthwaite@xilinx.com, aggelerf@ethz.ch, agraf@suse.de, blauwirbel@gmail.com, john.williams@xilinx.com, greg.bellows@linaro.org, pbonzini@redhat.com, alex.bennee@linaro.org, christoffer.dall@linaro.org, rth@twiddle.net Subject: [Qemu-devel] [PATCH v2 16/17] target-arm: Add IRQ and FIQ routing to EL2 and 3 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: "Edgar E. Iglesias" Signed-off-by: Edgar E. Iglesias Reviewed-by: Greg Bellows --- target-arm/cpu.h | 12 ++++++++++++ target-arm/helper.c | 13 +++++++++++++ 2 files changed, 25 insertions(+) diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 371f6d2..b95aeaa 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -1133,6 +1133,12 @@ static inline bool arm_excp_unmasked(CPUState *cs, unsigned int excp_idx) CPUARMState *env = cs->env_ptr; unsigned int cur_el = arm_current_pl(env); unsigned int target_el = arm_excp_target_el(cs, excp_idx); + /* FIXME: Use actual secure state. */ + bool secure = false; + /* Interrupts can only be hypervised and routed to + * EL2 if we are in NS EL0/1. + */ + bool irq_can_hyp = !secure && cur_el < 2 && target_el == 2; /* Don't take exceptions if they target a lower EL. */ if (cur_el > target_el) { @@ -1141,8 +1147,14 @@ static inline bool arm_excp_unmasked(CPUState *cs, unsigned int excp_idx) switch (excp_idx) { case EXCP_FIQ: + if (irq_can_hyp && (env->cp15.hcr_el2 & HCR_FMO)) { + return true; + } return !(env->daif & PSTATE_F); case EXCP_IRQ: + if (irq_can_hyp && (env->cp15.hcr_el2 & HCR_IMO)) { + return true; + } return ((IS_M(env) && env->regs[15] < 0xfffffff0) || !(env->daif & PSTATE_I)); default: diff --git a/target-arm/helper.c b/target-arm/helper.c index 026c802..2d4c3ba 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -3313,6 +3313,19 @@ unsigned int arm_excp_target_el(CPUState *cs, unsigned int excp_idx) target_el = 2; } break; + case EXCP_FIQ: + case EXCP_IRQ: { + const uint64_t hcr_mask = excp_idx == EXCP_FIQ ? HCR_FMO : HCR_IMO; + const uint32_t scr_mask = excp_idx == EXCP_FIQ ? SCR_FIQ : SCR_IRQ; + + if (!secure && (env->cp15.hcr_el2 & hcr_mask)) { + target_el = 2; + } + if (env->cp15.scr_el3 & scr_mask) { + target_el = 3; + } + break; + } } return target_el; }