From patchwork Fri May 30 07:28:21 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Edgar E. Iglesias" X-Patchwork-Id: 353906 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 143E3140092 for ; Fri, 30 May 2014 17:34:12 +1000 (EST) Received: from localhost ([::1]:51892 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WqHKL-0000Lg-L9 for incoming@patchwork.ozlabs.org; Fri, 30 May 2014 03:34:09 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48918) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WqHJa-0007d6-9l for qemu-devel@nongnu.org; Fri, 30 May 2014 03:33:28 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WqHJU-0004tS-7t for qemu-devel@nongnu.org; Fri, 30 May 2014 03:33:22 -0400 Received: from mail-pb0-x233.google.com ([2607:f8b0:400e:c01::233]:43066) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WqHJU-0004tN-1i for qemu-devel@nongnu.org; Fri, 30 May 2014 03:33:16 -0400 Received: by mail-pb0-f51.google.com with SMTP id ma3so1428197pbc.24 for ; Fri, 30 May 2014 00:33:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=LuEiqLe1P8V1sOeTMpCCFqea8JTZ0Ogpa4umwV+NSik=; b=mBecob8r+oRvOC9QyAuxTNN7x1QL9F0Zf9YCTZ3lnGtHfV2m+oJ7EFJ/TkIQWxw/XT XEq//WmV0HvsL4xJyCUJfwgc8bls7nusdna73vYqhD3X5r+KkUfS/8HJYuj82inLVXeh PoFxmREdKVRv81X0YkajZsLs3zj8EDj9LKlKC74yqfThArXan5tNmzyxpDMWgjMsbO/p wuXg4jk255K4cgrnnHnxmXVCjAlin9DlRDis9KgoS0CGhuUUaHoBr9I5FKTBzJtWuWI9 9MZ5ALS9/5eiP7CWExuIfcO6oqWnN8vlNLKwQzxaq3BoUbwgSsbcIUEVh5mY1Bob/fGt GUjg== X-Received: by 10.69.19.139 with SMTP id gu11mr16138268pbd.36.1401435195177; Fri, 30 May 2014 00:33:15 -0700 (PDT) Received: from localhost ([203.126.243.116]) by mx.google.com with ESMTPSA id ec2sm4792984pbc.63.2014.05.30.00.33.08 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Fri, 30 May 2014 00:33:14 -0700 (PDT) From: "Edgar E. Iglesias" To: qemu-devel@nongnu.org, peter.maydell@linaro.org Date: Fri, 30 May 2014 17:28:21 +1000 Message-Id: <1401434911-26992-7-git-send-email-edgar.iglesias@gmail.com> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1401434911-26992-1-git-send-email-edgar.iglesias@gmail.com> References: <1401434911-26992-1-git-send-email-edgar.iglesias@gmail.com> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:400e:c01::233 Cc: rob.herring@linaro.org, peter.crosthwaite@xilinx.com, aggelerf@ethz.ch, agraf@suse.de, blauwirbel@gmail.com, john.williams@xilinx.com, greg.bellows@linaro.org, pbonzini@redhat.com, alex.bennee@linaro.org, christoffer.dall@linaro.org, rth@twiddle.net Subject: [Qemu-devel] [PATCH v1 06/16] target-arm: Add FAR_EL2 and 3 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: "Edgar E. Iglesias" Signed-off-by: Edgar E. Iglesias --- target-arm/cpu.h | 2 +- target-arm/helper.c | 6 ++++++ 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/target-arm/cpu.h b/target-arm/cpu.h index f8ca1da..ef6a95d 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -187,7 +187,7 @@ typedef struct CPUARMState { uint32_t ifsr_el2; /* Fault status registers. */ uint64_t esr_el[4]; uint32_t c6_region[8]; /* MPU base/size registers. */ - uint64_t far_el[2]; /* Fault address registers. */ + uint64_t far_el[4]; /* Fault address registers. */ uint64_t par_el1; /* Translation result. */ uint32_t c9_insn; /* Cache lockdown registers. */ uint32_t c9_data; diff --git a/target-arm/helper.c b/target-arm/helper.c index da210b9..de5ee40 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -2120,6 +2120,9 @@ static const ARMCPRegInfo v8_el2_cp_reginfo[] = { .type = ARM_CP_NO_MIGRATE, .opc0 = 3, .opc1 = 4, .crn = 5, .crm = 2, .opc2 = 1, .access = PL2_RW, .fieldoffset = offsetof(CPUARMState, cp15.esr_el[2]) }, + { .name = "FAR_EL2", .state = ARM_CP_STATE_AA64, + .opc0 = 3, .opc1 = 4, .crn = 6, .crm = 0, .opc2 = 0, + .access = PL2_RW, .fieldoffset = offsetof(CPUARMState, cp15.far_el[2]) }, { .name = "SPSR_EL2", .state = ARM_CP_STATE_AA64, .type = ARM_CP_NO_MIGRATE, .opc0 = 3, .opc1 = 4, .crn = 4, .crm = 0, .opc2 = 0, @@ -2142,6 +2145,9 @@ static const ARMCPRegInfo v8_el3_cp_reginfo[] = { .type = ARM_CP_NO_MIGRATE, .opc0 = 3, .opc1 = 6, .crn = 5, .crm = 2, .opc2 = 1, .access = PL3_RW, .fieldoffset = offsetof(CPUARMState, cp15.esr_el[3]) }, + { .name = "FAR_EL3", .state = ARM_CP_STATE_AA64, + .opc0 = 3, .opc1 = 6, .crn = 6, .crm = 0, .opc2 = 0, + .access = PL3_RW, .fieldoffset = offsetof(CPUARMState, cp15.far_el[3]) }, { .name = "SPSR_EL3", .state = ARM_CP_STATE_AA64, .type = ARM_CP_NO_MIGRATE, .opc0 = 3, .opc1 = 6, .crn = 4, .crm = 0, .opc2 = 0,