From patchwork Sun May 25 01:08:31 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Edgar E. Iglesias" X-Patchwork-Id: 352192 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 8612714007C for ; Sun, 25 May 2014 11:11:46 +1000 (EST) Received: from localhost ([::1]:49819 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WoMyW-0005lP-6E for incoming@patchwork.ozlabs.org; Sat, 24 May 2014 21:11:44 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56761) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WoMxs-0004rq-30 for qemu-devel@nongnu.org; Sat, 24 May 2014 21:11:08 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WoMxl-0004Vb-Ch for qemu-devel@nongnu.org; Sat, 24 May 2014 21:11:04 -0400 Received: from mail-pa0-x235.google.com ([2607:f8b0:400e:c03::235]:43021) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WoMxl-0004VB-0o for qemu-devel@nongnu.org; Sat, 24 May 2014 21:10:57 -0400 Received: by mail-pa0-f53.google.com with SMTP id kp14so5827794pab.40 for ; Sat, 24 May 2014 18:10:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=/y85swo15zjvloO4Bc+BG71A1gjDom/jJCW/dSf3oYs=; b=Z7PXKIJbNVZJn28Utr/V7AdUdBjoSofNnR49LI93hx2lVgnC3ImNadgPdn5d5iHcqo WgdZrn08T7Ll+STRz4PGReZOf2KJzthyy/37PzhKO3Fkeqsem7azhpoRPf9dzycyEVmP dnLcLXWlYRBTOI8cGB+xwsg3BSzitMH7U9G+q5RrkYQODbd6HGE/xOjWCe5KIxItZhmO E1v0XwsKS5bi4+Mzn15WsLylINn3ZiomlvPiH2eQbP7swoDhTczLsEUTCuHZ6ANyXR6C 3Uy30vdsn13ICKIozOEHGqk7uZMm8lLwyFurWGOZD3S8wzp2sz18j9W32tAoOH6n3aUD 0QJg== X-Received: by 10.66.186.238 with SMTP id fn14mr17083603pac.135.1400980256052; Sat, 24 May 2014 18:10:56 -0700 (PDT) Received: from localhost ([203.126.243.116]) by mx.google.com with ESMTPSA id fu12sm35906791pad.42.2014.05.24.18.10.49 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Sat, 24 May 2014 18:10:55 -0700 (PDT) From: "Edgar E. Iglesias" To: qemu-devel@nongnu.org, peter.maydell@linaro.org Date: Sun, 25 May 2014 11:08:31 +1000 Message-Id: <1400980132-25949-3-git-send-email-edgar.iglesias@gmail.com> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1400980132-25949-1-git-send-email-edgar.iglesias@gmail.com> References: <1400980132-25949-1-git-send-email-edgar.iglesias@gmail.com> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:400e:c03::235 Cc: rob.herring@linaro.org, peter.crosthwaite@xilinx.com, aggelerf@ethz.ch, agraf@suse.de, john.williams@xilinx.com, greg.bellows@linaro.org, alex.bennee@linaro.org, christoffer.dall@linaro.org, rth@twiddle.net Subject: [Qemu-devel] [PATCH v5 02/23] target-arm/translate.c: Clean up mmu index handling for ldrt/strt X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Peter Maydell Clean up the mmu index handling for ldrt/strt insns: instead of a flag 'user' indicating whether to treat the store as user mode or not, use 'memidx' to indicate the correct memory index to use. Reviewed-by: Edgar E. Iglesias Signed-off-by: Peter Maydell --- target-arm/translate.c | 29 +++++++++++++++++------------ 1 file changed, 17 insertions(+), 12 deletions(-) diff --git a/target-arm/translate.c b/target-arm/translate.c index a4d920b..e708f4a 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -8568,7 +8568,12 @@ static void disas_arm_insn(CPUARMState * env, DisasContext *s) rn = (insn >> 16) & 0xf; rd = (insn >> 12) & 0xf; tmp2 = load_reg(s, rn); - i = (IS_USER(s) || (insn & 0x01200000) == 0x00200000); + if ((insn & 0x01200000) == 0x00200000) { + /* ldrt/strt */ + i = MMU_USER_IDX; + } else { + i = get_mem_index(s); + } if (insn & (1 << 24)) gen_add_data_offset(s, insn, tmp2); if (insn & (1 << 20)) { @@ -9841,7 +9846,7 @@ static int disas_thumb2_insn(CPUARMState *env, DisasContext *s, uint16_t insn_hw { int postinc = 0; int writeback = 0; - int user; + int memidx; if ((insn & 0x01100000) == 0x01000000) { if (disas_neon_ls_insn(env, s, insn)) goto illegal_op; @@ -9885,7 +9890,7 @@ static int disas_thumb2_insn(CPUARMState *env, DisasContext *s, uint16_t insn_hw return 1; } } - user = IS_USER(s); + memidx = get_mem_index(s); if (rn == 15) { addr = tcg_temp_new_i32(); /* PC relative. */ @@ -9922,7 +9927,7 @@ static int disas_thumb2_insn(CPUARMState *env, DisasContext *s, uint16_t insn_hw break; case 0xe: /* User privilege. */ tcg_gen_addi_i32(addr, addr, imm); - user = 1; + memidx = MMU_USER_IDX; break; case 0x9: /* Post-decrement. */ imm = -imm; @@ -9949,19 +9954,19 @@ static int disas_thumb2_insn(CPUARMState *env, DisasContext *s, uint16_t insn_hw tmp = tcg_temp_new_i32(); switch (op) { case 0: - gen_aa32_ld8u(tmp, addr, user); + gen_aa32_ld8u(tmp, addr, memidx); break; case 4: - gen_aa32_ld8s(tmp, addr, user); + gen_aa32_ld8s(tmp, addr, memidx); break; case 1: - gen_aa32_ld16u(tmp, addr, user); + gen_aa32_ld16u(tmp, addr, memidx); break; case 5: - gen_aa32_ld16s(tmp, addr, user); + gen_aa32_ld16s(tmp, addr, memidx); break; case 2: - gen_aa32_ld32u(tmp, addr, user); + gen_aa32_ld32u(tmp, addr, memidx); break; default: tcg_temp_free_i32(tmp); @@ -9978,13 +9983,13 @@ static int disas_thumb2_insn(CPUARMState *env, DisasContext *s, uint16_t insn_hw tmp = load_reg(s, rs); switch (op) { case 0: - gen_aa32_st8(tmp, addr, user); + gen_aa32_st8(tmp, addr, memidx); break; case 1: - gen_aa32_st16(tmp, addr, user); + gen_aa32_st16(tmp, addr, memidx); break; case 2: - gen_aa32_st32(tmp, addr, user); + gen_aa32_st32(tmp, addr, memidx); break; default: tcg_temp_free_i32(tmp);